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@@ -11,6 +11,22 @@ Libre-SOC OpenPOWER ISA RFCs
 
 <https://libre-soc.org/nlnet_2022_opf_isa_wg>
 
 
 <https://libre-soc.org/nlnet_2022_opf_isa_wg>
 

+# Summary
+
+In earlier NLnet Grants, thanks to EU funding, we developed Draft
+SVP64 (a Vector Extension for the Power ISA), around a hundred
+new Draft instructions that dramatically improves the Supercomputing-class
+Power ISA, a Simulator, thousands
+of unit tests and over 350 pages of documentation.  What we could
+not do however was submit a Specification to the OpenPOWER ISA
+Working Group because the ISA WG was in the process of being
+ratified.  That has now been done, and we need to begin the
+formal process of writing up "Requests For Change" and submitting
+them. The end result will be an extremely powerful Vector ISA suitable
+for use in Digitally-Sovereign end-user products.
+
+# Submission to NLnet
+

 Please be short and to the point in your answers; focus primarily on
 the what and how, not so much on the why. Add longer descriptions as
 attachments (see below). If English isn't your first language, don't
 Please be short and to the point in your answers; focus primarily on
 the what and how, not so much on the why. Add longer descriptions as
 attachments (see below). If English isn't your first language, don't