ls003: now 5 instructions being proposed.

shorten the words in the observations section to fit onto 1st page

diff --git a/openpower/sv/rfc/ls003.mdwn b/openpower/sv/rfc/ls003.mdwn
index 0ab082c0f6b53b7faf7d4125a613bcfd91d0a992..af41f94d2c0714622361c0d2847bbfca3c998b6f 100644 (file)
--- a/openpower/sv/rfc/ls003.mdwn
+++ b/openpower/sv/rfc/ls003.mdwn
@@ -46,7 +46,7 @@ Instructions added
 **Impact on processor**:
 
 ```
-    Addition of four new GPR-based instructions
+    Addition of five new GPR-based instructions
 ```
 
 **Impact on software**:
@@ -76,14 +76,12 @@ Instructions added
 
 **Notes and Observations**:
 
-TODO: address Jacob's comments: https://libre-soc.org/irclog/%23libre-soc.2022-10-28.log.html#t2022-10-28T18:00:27
-
-1. It is not practical to add Rc=1 variants as VA-Form is used and
+1. It is not practical to add Rc=1 variants when VA-Form is used and
    there is a **pair** of results produced.
 2. An overflow variant (XER.OV set) of `divmod2du` would be valuable
    but VA-Form EXT004 is under severe pressure.
 3. Both `maddhdu` and `divmod2du` instructions have been present in Intel x86
-   for several decades.  Likewise, variants of `dsld` and `dsrd`.
+   for several decades.  Likewise, `dsld` and `dsrd`.
 4. None of these instruction is present in VSX: these are 128/64 whereas
    VSX is 128/128.
 5. `maddedu` and `divmod2du` are full inverses of each other, including
@@ -91,11 +89,10 @@ TODO: address Jacob's comments: https://libre-soc.org/irclog/%23libre-soc.2022-1
 6. These are all 3-in 2-out instructions. If Power ISA did not already
   have LD/ST-with-update instructions and instructions with `RAp`
   and `RTp` then these instructions would not be proposed.
-7. `maddedus` is the first scalar signed/unsigned multiply instruction, the
-  only other signed/unsigned multiply instruction is `vmsummbm`, which has the
-  drawbacks that it is rather specialist, only working on bytes,
-  requires VSX/VMX, and isn't very suited for big-integer multiplication or
-  other general integer arithmetic.
+7. `maddedus` is the first Scalar signed/unsigned multiply instruction. The
+  only other signed/unsigned multiply instruction is the
+  specialist `vmsummbm` (bytes only), requires VSX,
+  and is unsuited for big-integer or other general arithmetic.
 
 **Changes**