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diff --git a/docs/pinmux.mdwn b/docs/pinmux.mdwn
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@@ -9,8 +9,9 @@ Links:
 
 Managing IO on an ASIC is nowhere near as simple as on an FPGA.
 An FPGA has built-in IO Pads, the wires terminate inside an
-existing silicon block which has been tested for you.  In an
-ASIC, a bi-directional IO Pad requires three wires (in, out,
+existing silicon block which has been tested for you.
+In an ASIC, you are going to have to do everything yourself.
+In an ASIC, a bi-directional IO Pad requires three wires (in, out,
 out-enable) to be routed right the way from the ASIC, all
 the way to the IO PAD, where only then does a wire bond connect
 it to a single pin.