(no commit message)

diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn
index 495148b6f7e0ccd2f4b6d5f91a2fcaf221ebd248..0098bb78156251079e44dd01ca101fcc5a805e69 100644 (file)
--- a/openpower/sv/ldst.mdwn
+++ b/openpower/sv/ldst.mdwn
@@ -43,15 +43,16 @@ a number of different modes:
 * **Speculative fail-first** - where it makes sense to do so
 * **Structure Packing** - covered in SV by [[sv/remap]] and Pack/Unpack Mode.
 
-Also included in SVP64 LD/ST is both signed and unsigned Saturation,
-as well as Element-width overrides and Twin-Predication.
-
 *Despite being constructed from Scalar LD/ST none of these Modes
 exist or make sense in any Scalar ISA. They **only** exist in Vector ISAs*
 
+Also included in SVP64 LD/ST is both signed and unsigned Saturation,
+as well as Element-width overrides and Twin-Predication.
+
 Note also that Indexed [[sv/remap]] mode may be applied to both
 v3.0 LD/ST Immediate instructions *and* v3.0 LD/ST Indexed instructions.
-LD/ST-Indexed should not be conflated with Indexed REMAP mode.
+LD/ST-Indexed should not be conflated with Indexed REMAP mode: clarification
+is provided below.
 
 # Determining the LD/ST Modes