2020-08-24 Hongtao Liu <hongtao.liu@intel.com>
gcc/ChangeLog:
PR target/96755
* config/i386/sse.md: Correct the mode of NOT operands to
SImode.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr96755.c: New test.
(define_split
[(set (match_operand:DI 0 "mask_reg_operand")
(zero_extend:DI
- (not:DI (match_operand:SI 1 "mask_reg_operand"))))]
+ (not:SI (match_operand:SI 1 "mask_reg_operand"))))]
"TARGET_AVX512BW && reload_completed"
[(parallel
[(set (match_dup 0)
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=skylake-avx512" } */
+
+extern long var_22;
+extern int arr_3[];
+extern int arr_4[][20][9];
+short a;
+void test(unsigned short b, unsigned char e, long long g) {
+ for (long c = 0; c < 20ULL; c = g)
+ for (short d = 0; d < 9; d++)
+ for (char f = e; f < 8; f += 4) {
+ arr_3[f] = 0;
+ var_22 = ~(unsigned)b;
+ arr_4[c][d][f] = a;
+ }
+}