Currently in Draft form, [[openpower/sv/svp64]] is the basis of the
Supercomputing Cray-style Vectorisation of the Power ISA.
+
+## Checklist for adding an instruction
+
+TODO. use the commit diffs for these instructions as a guide
+
+* fmvis <https://bugs.libre-soc.org/show_bug.cgi?id=887>
+* avgadd etc. <https://bugs.libre-soc.org/show_bug.cgi?id=863>
+* int min/max <https://bugs.libre-soc.org/show_bug.cgi?id=234#c1>
+* ternlogi <https://bugs.libre-soc.org/show_bug.cgi?id=745> which included
+ adding a hardware implementation as well