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diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index e340c9cb2617380ff41fa26efbae36746a819b21..12327582a862856180852a361e639ad66a629012 100644 (file)
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -493,12 +493,12 @@ if (mode_is_64bit) then M <- 0
 else M <- 32
 ctr_ok <- BO[2] | ((CTR[M:63] != 0) ^ BO[3])
 cond_ok <- BO[0] | ¬(CR[BI+32] ^ BO[1])
-if ¬predicate_bit then cond_ok = ctr_ok = SVRMmode.SNZ
-if ¬predicate_bit & ¬SVRMmode.sz & ¬BO[2] & CTRtest & ¬CTI then
-  CTR = CTR - 1
+if ¬predicate_bit & ¬SVRMmode.sz then
+  if ¬BO[2] & CTRtest & ¬CTI then
+    CTR = CTR - 1
   stop # instruction finishes here
-ctrdec = ¬BO[2] & ¬(CTRtest & (cond_ok ^ CTi))
-if ctrdec then CTR <- CTR - 1
+if ¬predicate_bit then cond_ok = ctr_ok = SVRMmode.SNZ
+if ¬BO[2] & ¬(CTRtest & (cond_ok ^ CTi)) then CTR <- CTR - 1
 lr_ok <- SVRMmode.LRu
 if ctr_ok & cond_ok then
   if AA then NIA <-iea EXTS(BD || 0b00)
@@ -529,7 +529,7 @@ for srcstep in range(VL):
       # inverted CTR test skip mode
       if ¬BO[2] & CTRtest & ¬CTI then
         CTR = CTR - 1
-        continue # skip to next element
+      continue # skip to next element
     else
         testbit = SVRMmode.SNZ
     # actual element test here