(no commit message)
authorlkcl <lkcl@web>
Sat, 30 Jan 2021 00:21:30 +0000 (00:21 +0000)
committerIkiWiki <ikiwiki.info>
Sat, 30 Jan 2021 00:21:30 +0000 (00:21 +0000)
openpower/sv/implementation.mdwn

index e60c5bb8521023357094fea3e0d6a4c0a4414d0c..15ac7b3df4f02f5255785e958f8a54910403d17f 100644 (file)
@@ -16,10 +16,10 @@ Links:
 * <https://bugs.libre-soc.org/show_bug.cgi?id=241> gem5 / ISACaller simulator
   - <https://bugs.libre-soc.org/show_bug.cgi?id=581> gem5 upstreaming
 * <https://bugs.libre-soc.org/show_bug.cgi?id=583> TestIssuer
+* <https://bugs.libre-soc.org/show_bug.cgi?id=588> PowerDecoder2
 * <https://bugs.libre-soc.org/show_bug.cgi?id=587> setvl ancillary tasks
  (instruction form SVL-Form, field designations, pseudocode, SPR allocation)
 
-
 # Code to convert
 
 There are four projects: