add bold to exec summary, link to bigint analysis

diff --git a/openpower/sv/comparison_table.mdwn b/openpower/sv/comparison_table.mdwn
index 00f78b6cda4beab44c3bccd34f0f3395aab5573b..97db1faf52c99656231871eaeeba0b0514f14c78 100644 (file)
--- a/openpower/sv/comparison_table.mdwn
+++ b/openpower/sv/comparison_table.mdwn
@@ -10,7 +10,7 @@
 |Aurora SX (21)|~200 (22)      |Scalable (23)        |yes                |yes                 |no                   |yes                      |no                     |no                    |no                   |no                            |no                   |no                   |
 
 * (1): plus EXT001 24-bit prefixing. See [[sv/svp64]]
-* (2): A 2-Dimensional Scalable Vector ISA with both Horizontal-First and Vertical-First Modes. See [[sv/vector_isa_comparison]]
+* (2): A 2-Dimensional Scalable Vector ISA **specifically designed for the Power ISA** with both Horizontal-First and Vertical-First Modes. See [[sv/vector_isa_comparison]]
 * (3): on specific operations.  See [[opcode_regs_deduped]] for full list
 * (4): SVP64 provides a Vector concept on top of the **Scalar** GPR, FPR and CR Fields, extended to 128 entries.
 * (5): SVP64 Vectorises Scalar instructions. It is up to the **implementor** to choose (**optionally**) whether to apply SVP64 to e.g. VSX Quad-Precision (128-bit) instructions, to create 128-bit Vector operations.