dummy commit

diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn
index d9ebd84a71f96c9189db6c70541983f539325dfc..c8722ac6870b5275c856a1824a5324e78def1800 100644 (file)
--- a/openpower/sv/rfc/ls001.mdwn
+++ b/openpower/sv/rfc/ls001.mdwn
@@ -345,7 +345,8 @@ mask `sv.bc/pm=r3`.
 Traditional Vector ISAs have vastly more (and more complex) addressing
 modes: unit strided, element strided, Indexed, Structure Packing. All
 of these had to be jammed in on top of existing Scalar instructions
-**without modifying the Scalar instructions**.  A small conceptual
+**without modifying or adding new Scalar instructions**.
+A small conceptual
 "cheat" was therefore needed.  The Immediate (D) is in some Modes
 multiplied by the element index, which gives us element-strided.
 For unit-strided the width of the operation (`ld`, 8 byte) is