add CR operations

diff --git a/openpower/sv/16_bit_compressed.mdwn b/openpower/sv/16_bit_compressed.mdwn
index 603f385634790fb818bb10abf5ac9a7b6cf136ec..ed0e89e5c028b9ec6ded9b7962570132f1fa15bd 100644 (file)
--- a/openpower/sv/16_bit_compressed.mdwn
+++ b/openpower/sv/16_bit_compressed.mdwn
@@ -144,8 +144,26 @@ that do not fit in the extreme limited space.
 
     | 0 1 2 3 | 4   | | 5 6 7 | 8 9 | a b | c d e  | f |
     | 0 0 0 0 | BF2 | | 0 0 1 | 10  | BF  | BFA    | 1 | mcrf
+    | 0 0 0 1 | BA2 | | 0 0 1 | 10  | BA  | BB     | 1 | crnor
+    | 0 1 0 0 | BA2 | | 0 0 1 | 10  | BA  | BB     | 1 | crandc
+    | 0 1 1 0 | BA2 | | 0 0 1 | 10  | BA  | BB     | 1 | crxor
+    | 0 1 1 1 | BA2 | | 0 0 1 | 10  | BA  | BB     | 1 | crnand
+    | 1 0 0 0 | BA2 | | 0 0 1 | 10  | BA  | BB     | 1 | crand
+    | 1 0 0 1 | BA2 | | 0 0 1 | 10  | BA  | BB     | 1 | creqv
+    | 1 1 0 1 | BA2 | | 0 0 1 | 10  | BA  | BB     | 1 | crorc
+    | 1 1 1 0 | BA2 | | 0 0 1 | 10  | BA  | BB     | 1 | cror
 
 10 bit mode:
 
-* BF is only 2 bits which means the destination is only CR0-CR3
+* mcrf BF is only 2 bits which means the destination is only CR0-CR3
+
+16 bit mode:
+
+* mcrf BF2 extends BF (in MSB) to 3 bits
+* CR operations: destination register is same as BA.
+* CR operations: only possible on CR0 and CR1
+
+SV (Vector Mode):
+
+* CR operations: greatly extended reach/range (useful for predicates)