add cross-references to bugreports and wiki
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 24 Mar 2020 10:26:10 +0000 (10:26 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 24 Mar 2020 10:55:58 +0000 (10:55 +0000)
src/soc/scoreboard/addr_split.py

index d2087003e78781963bdc5d5a897de9e08e456b09..32f17f36c6a50439b8b642fa22a22f8493799971 100644 (file)
@@ -1,4 +1,10 @@
 # LDST Address Splitter.  For misaligned address crossing cache line boundary
+"""
+Links:
+* https://libre-riscv.org/3d_gpu/architecture/6600scoreboard/
+* http://bugs.libre-riscv.org/show_bug.cgi?id=257
+* http://bugs.libre-riscv.org/show_bug.cgi?id=216
+"""
 
 from nmigen import Elaboratable, Module, Signal, Record, Array, Const
 from nmutil.latch import SRLatch, latchregister