(no commit message)

diff --git a/simple_v_extension/specification/mv.x.rst b/simple_v_extension/specification/mv.x.rst
index f0ed748f16bf92b1beea97ee321a8647ee0c736e..916445e947135ca8a9bc9157d18987a06d664b57 100644 (file)
--- a/simple_v_extension/specification/mv.x.rst
+++ b/simple_v_extension/specification/mv.x.rst
@@ -55,3 +55,9 @@ macro-op fusion
 
 there is the potential for macro-op fusion of mv-swizzle with the following instruction and/or preceding instruction.
 <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-August/002486.html>
+
+VBLOCK context?
+===============
+
+additional idea: a VBLOCK context that says that if a given register is used, it indicates that the
+register is to be "swizzled", and the VBLOCK swizzle context contains the swizzling to be carried out.