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diff --git a/openpower/sv/implementation.mdwn b/openpower/sv/implementation.mdwn
index 9a5f6e6299842ebec9a50dc611b343db8d757a48..b8230f3ea1e1f4feceb3f86ad1365d5a9cc2b3c5 100644 (file)
--- a/openpower/sv/implementation.mdwn
+++ b/openpower/sv/implementation.mdwn
@@ -7,3 +7,15 @@ one at a time.
 Links:
 
 * <http://lists.libre-soc.org/pipermail/libre-soc-dev/2021-January/001865.html>
+
+# Code to convert
+
+There are three projects:
+
+* TestIssuer (the HDL)
+* ISACaller (the python-based simulator)
+* power-gem5 (a cycle accurate simulator)
+
+Each of these needs to have SV augmentation, and the best way to
+do it is if they are all done at the same time, implementing the same
+incremental feature.