add WIP DCBZTestCase

diff --git a/src/soc/simple/test/test_issuer_dcache.py b/src/soc/simple/test/test_issuer_dcache.py
index 933bb2f9af937afd8048dff1db1e401d7d175481..b44633f8672a07b860da23d980222bd078e89d4e 100644 (file)
--- a/src/soc/simple/test/test_issuer_dcache.py
+++ b/src/soc/simple/test/test_issuer_dcache.py
@@ -25,6 +25,29 @@ from soc.simple.test.test_runner import TestRunner
 #from openpower.test.ldst.ldst_exc_cases import LDSTExceptionTestCase
 #from openpower.simulator.test_sim import (GeneralTestCases, AttnTestCase)
 
+##########
+from openpower.simulator.program import Program
+from openpower.endian import bigendian
+from openpower.test.common import TestAccumulatorBase
+
+
+#TODO run this test case later
+class DCBZTestCase(TestAccumulatorBase):
+
+    def case_1_dcbz(self):
+        lst = ["dcbz 1, 2"]
+        initial_regs = [0] * 32
+        initial_regs[1] = 0x0004
+        initial_regs[2] = 0x0008
+        initial_mem = {0x0000: (0x5432123412345678, 8),
+                       0x0008: (0xabcdef0187654321, 8),
+                       0x0020: (0x1828384822324252, 8),
+                        }
+        self.add_case(Program(lst, bigendian), initial_regs,
+                             initial_mem=initial_mem)
+##########
+
+
 if __name__ == "__main__":
     svp64 = False
     #if len(sys.argv) == 2: