synth_gatemate: Registers are uninitialized

diff --git a/techlibs/gatemate/cells_sim.v b/techlibs/gatemate/cells_sim.v
index 0c9287b8176d379a784d2386cef340fb9d2bcb99..c1cacc6d123e3c769a9469d1fa4d547fbe7f60a3 100644 (file)
--- a/techlibs/gatemate/cells_sim.v
+++ b/techlibs/gatemate/cells_sim.v
@@ -294,7 +294,7 @@ module CC_DFF #(
        assign en  = (EN_INV)  ?  ~EN :  EN;\r
        assign sr  = (SR_INV)  ?  ~SR :  SR;\r
 \r
-       initial Q = 1'b0;\r
+       initial Q = 1'bX;\r
 \r
        always @(posedge clk or posedge sr)\r
        begin\r
@@ -323,7 +323,7 @@ module CC_DLT #(
        assign en  = (G_INV) ? ~G : G;\r
        assign sr  = (SR_INV) ? ~SR : SR;\r
 \r
-       initial Q = 1'b0;\r
+       initial Q = 1'bX;\r
 \r
        always @(*)\r
        begin\r

diff --git a/techlibs/gatemate/synth_gatemate.cc b/techlibs/gatemate/synth_gatemate.cc
index 27a2b5bfa885a4e63d92beef49aa8330bca6b330..b570e1e2a317d384ded71becf810d85779199df7 100644 (file)
--- a/techlibs/gatemate/synth_gatemate.cc
+++ b/techlibs/gatemate/synth_gatemate.cc
@@ -305,7 +305,7 @@ struct SynthGateMatePass : public ScriptPass
                if (check_label("map_regs"))\r
                {\r
                        run("opt_clean");\r
-                       run("dfflegalize -cell $_DFFE_????_ 0 -cell $_DLATCH_???_ 0");\r
+                       run("dfflegalize -cell $_DFFE_????_ x -cell $_DLATCH_???_ x");\r
                        run("techmap -map +/gatemate/reg_map.v");\r
                        run("opt_expr -mux_undef");\r
                        run("simplemap");\r