(no commit message)

diff --git a/simple_v_extension/specification.mdwn b/simple_v_extension/specification.mdwn
index 1e741937a28fed286f52221693b78b5fa9f7819c..89b6bc082f2e5fbaf70daea556f0770b9a5690ed 100644 (file)
--- a/simple_v_extension/specification.mdwn
+++ b/simple_v_extension/specification.mdwn
@@ -2527,3 +2527,8 @@ VLIW format
 ---
 
 Could the 8 bit Register VLIW format use regnum<<1 instead, only accessing regs 0 to 64?
+
+--
+
+TODO evaluate strncpy and strlen
+https://groups.google.com/forum/m/#!msg/comp.arch/bGBeaNjAKvc/_vbqyxTUAQAJ