error in address width (truncated) in setting up L0CacheBuffer

diff --git a/src/soc/experiment/l0_cache.py b/src/soc/experiment/l0_cache.py
index aadd4f48b1f2f0421f9864c896edb5c48d881f28..ae5aea75c555424b42417b47c443f1cd9c87c9c2 100644 (file)
--- a/src/soc/experiment/l0_cache.py
+++ b/src/soc/experiment/l0_cache.py
@@ -498,7 +498,7 @@ class L0CacheBuffer(Elaboratable):
 class TstL0CacheBuffer(Elaboratable):
     def __init__(self, n_units=3, regwid=16, addrwid=4):
         self.mem = TestMemory(regwid, addrwid, granularity=regwid//8)
-        self.l0 = L0CacheBuffer(n_units, self.mem, regwid, addrwid)
+        self.l0 = L0CacheBuffer(n_units, self.mem, regwid, addrwid<<1)
 
     def elaborate(self, platform):
         m = Module()