cleanup sof and sif

diff --git a/openpower/sv/sif.py b/openpower/sv/sif.py
index adaf0b17d0c8385726fd0c048604ce5e7021ad99..46f6b4504b8b9fc6227dd5d3fb17f14cf03d2887 100644 (file)
--- a/openpower/sv/sif.py
+++ b/openpower/sv/sif.py
@@ -10,9 +10,9 @@ def sif(RA, mask=None, zero=False):
         if setting_mode and mask is not None and not (mask & bit):
             setting_mode = False # masked out, stop setting
         if setting_mode:
+            RT |= bit    # inclusively set bit in RT
             if RA & bit: # found a bit in rs1: stop setting RT
                 setting_mode = False
-            RT |= bit
         i += 1
     return RT
 

diff --git a/openpower/sv/sof.py b/openpower/sv/sof.py
index 164c32623e3d2dd02587b1834e4ef8c713f9d22d..66f4b86afbe3a8ae4c94a947389a2cc9c5b222fb 100644 (file)
--- a/openpower/sv/sof.py
+++ b/openpower/sv/sof.py
@@ -8,14 +8,13 @@ def sof(RA, mask=None, zero=False):
         bit = 1<<i
         if not setting_mode and mask is not None and (mask & bit):
             setting_mode = True # back into "setting" mode
-            found = False
+            found = False       # start finding first
         if setting_mode:
             if mask is not None and not (mask & bit):
                 setting_mode = False
-            elif RA & bit: # found a bit in rs1: stop setting RT
-                if not found:
-                    found = True
-                    RT |= bit
+            elif RA & bit and not found: # found a bit: set if not found
+                RT |= bit
+                found = True # don't set another bit
         i += 1
     return RT