Remove spurious assertion in isLegalElimination (#8812)
authorAndrew Reynolds <andrew.j.reynolds@gmail.com>
Mon, 23 May 2022 21:11:07 +0000 (16:11 -0500)
committerGitHub <noreply@github.com>
Mon, 23 May 2022 21:11:07 +0000 (21:11 +0000)
Fixes #8805.

The isLegalElimination method correctly catches Int -> Real as an illegal elimination.

src/theory/theory.cpp
test/regress/cli/CMakeLists.txt
test/regress/cli/regress0/arith/issue8805-mixed-var-elim.smt2 [new file with mode: 0644]

index d5df7084a25db348692088411ea038560b29f4a1..9ba9ad028b7e6b0ef5b7441a8f5fd9eb4f5e2768 100644 (file)
@@ -322,8 +322,6 @@ bool Theory::isLegalElimination(TNode x, TNode val)
   }
   if (val.getType() != x.getType())
   {
-    Assert(false) << "isLegalElimination for disequal typed terms " << x
-                  << " -> " << val;
     return false;
   }
   if (!options().smt.produceModels || options().smt.modelVarElimUneval)
index 5156d97df3845c093e3385a82175cc2b267c0ba0..a9d2f4f6e2e932a4cbfd57fd896fecff843ae3b3 100644 (file)
@@ -67,6 +67,7 @@ set(regress_0_tests
   regress0/arith/issue5761-ppr.smt2
   regress0/arith/issue8097-iid.smt2
   regress0/arith/issue8159-rewrite-intreal.smt2
+  regress0/arith/issue8805-mixed-var-elim.smt2
   regress0/arith/ite-lift.smt2
   regress0/arith/leq.01.smtv1.smt2
   regress0/arith/miplib.cvc.smt2
diff --git a/test/regress/cli/regress0/arith/issue8805-mixed-var-elim.smt2 b/test/regress/cli/regress0/arith/issue8805-mixed-var-elim.smt2
new file mode 100644 (file)
index 0000000..5fa5684
--- /dev/null
@@ -0,0 +1,6 @@
+(set-logic ALL)
+(set-info :status sat)
+(declare-const a Real) 
+(declare-const b Int) 
+(assert (= (to_real b) (* a a)))
+(check-sat)