arch-power: Add fields for MD and MDS form instructions

This introduces the extended opcode fields and the fields
mb and me for MD and MDS form instructions.

Change-Id: I2c3366794ed42f5d31ba1d69e360c0ac67c74e06
Signed-off-by: Sandipan Das <sandipan@linux.vnet.ibm.com>

diff --git a/src/arch/power/isa/bitfields.isa b/src/arch/power/isa/bitfields.isa
index 2719dc1c42aea7e2731c125a7dd9bfdcd73809c9..0b5f23f0833cafe0c8d689fdd221356942a8a825 100644 (file)
--- a/src/arch/power/isa/bitfields.isa
+++ b/src/arch/power/isa/bitfields.isa
@@ -40,6 +40,8 @@ def bitfield PO            <31:26>;
 def bitfield A_XO          <5:1>;
 def bitfield DS_XO         <1:0>;
 def bitfield DX_XO         <5:1>;
+def bitfield MD_XO         <4:2>;
+def bitfield MDS_XO        <4:1>;
 def bitfield VA_XO         <5:0>;
 def bitfield X_XO          <10:1>;
 def bitfield XFL_XO        <10:1>;

diff --git a/src/arch/power/types.hh b/src/arch/power/types.hh
index afbc88d992a45c65d4ca83c1769be6bbe1bafc3b..ccbd6705fc383b061f2145690221481b3ae6b29b 100644 (file)
--- a/src/arch/power/types.hh
+++ b/src/arch/power/types.hh
@@ -50,7 +50,9 @@ BitUnion32(ExtMachInst)
     Bitfield<15, 11> sh;
     Bitfield<1>      shn;
     Bitfield<10,  6> mb;
+    Bitfield<5>      mbn;
     Bitfield< 5,  1> me;
+    Bitfield<5>      men;
 
     // Immediate fields
     Bitfield<15,  0> si;