add reshaping section

diff --git a/simple_v_extension/specification.mdwn b/simple_v_extension/specification.mdwn
index b46d937f1043d8029311ce87a06ea16383d20096..22c22febb02678e802206d32492731468e08f9a3 100644 (file)
--- a/simple_v_extension/specification.mdwn
+++ b/simple_v_extension/specification.mdwn
@@ -428,10 +428,10 @@ up to 3 registers:
 | ------ | ------ | ------ | -- | ------- | -- | ------- | -- | ------- |
 | shape2 | shape1 | shape0 | 0  | regidx2 | 0  | regidx1 | 0  | regidx0 |
 
-regidx0-2 refer not to the Registe CSR CAM entry but to the underlying
+regidx0-2 refer not to the Register CSR CAM entry but to the underlying
 *real* register (see regidx, the value) and consequently is 7-bits wide.
 shape0-2 refers to one of three SHAPE CSRs.  A value of 0x3 is reserved.
-Bits 7, 15, 23, 30 and 31 are reserved, and must be set to zero.
+Bits 7, 15, 23, 30 and 31 are also reserved, and must be set to zero.
 
 ## SHAPE 1D/2D/3D vector-matrix remapping CSRs