more alteration of wire_defs to make auto-generation easier
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 22 Mar 2018 05:39:09 +0000 (05:39 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 22 Mar 2018 05:39:09 +0000 (05:39 +0000)
src/wire_def.py

index 9e6b90d9e6432eb667594541a6618e42c201ebd1..f14fe3244e4d2d8682a068d14da2e843b7d4eaca 100644 (file)
@@ -7,7 +7,6 @@ generic_io = '''
 '''
 uartwires = '''
       Wire#(Bit#(1)) wruart{0}_rx<-mkDWire(0);
-      Wire#(Bit#(1)) wruart{0}_tx<-mkDWire(0);
       GenericIOType uart{0}_rx_io=GenericIOType{{
                  outputval:0,
                  output_en:0,
@@ -18,6 +17,7 @@ uartwires = '''
                  drivestrength:0,
                  opendrain_en:0
       }};
+      Wire#(Bit#(1)) wruart{0}_tx<-mkDWire(0);
       GenericIOType uart{0}_tx_io=GenericIOType{{
                  outputval:wruart{0}_tx,
                  output_en:1,
@@ -31,9 +31,6 @@ uartwires = '''
 '''
 spiwires = '''
       Wire#(Bit#(1)) wrspi{0}_sclk<-mkDWire(0);
-      Wire#(Bit#(1)) wrspi{0}_mosi<-mkDWire(0);
-      Wire#(Bit#(1)) wrspi{0}_ss<-mkDWire(0);
-      Wire#(Bit#(1)) wrspi{0}_miso<-mkDWire(0);
       GenericIOType spi{0}_sclk_io = GenericIOType{{
                  outputval:wrspi{0}_sclk,
                  output_en:1,
@@ -44,6 +41,7 @@ spiwires = '''
                  drivestrength:0,
                  opendrain_en:0
       }};
+      Wire#(Bit#(1)) wrspi{0}_mosi<-mkDWire(0);
       GenericIOType spi{0}_mosi_io = GenericIOType{{
                  outputval:wrspi{0}_mosi,
                  output_en:1,
@@ -54,6 +52,7 @@ spiwires = '''
                  drivestrength:0,
                  opendrain_en:0
       }};
+      Wire#(Bit#(1)) wrspi{0}_ss<-mkDWire(0);
       GenericIOType spi{0}_ss_io = GenericIOType{{
                  outputval:wrspi{0}_ss,
                  output_en:1,
@@ -64,6 +63,7 @@ spiwires = '''
                  drivestrength:0,
                  opendrain_en:0
       }};
+      Wire#(Bit#(1)) wrspi{0}_miso<-mkDWire(0);
       GenericIOType spi{0}_miso_io = GenericIOType{{
                  outputval:0,
                  output_en:0,
@@ -80,9 +80,6 @@ twiwires = '''
       Wire#(Bit#(1)) wrtwi{0}_sda_out<-mkDWire(0);
       Wire#(Bit#(1)) wrtwi{0}_sda_outen<-mkDWire(0);
       Wire#(Bit#(1)) wrtwi{0}_sda_in<-mkDWire(0);
-      Wire#(Bit#(1)) wrtwi{0}_scl_out<-mkDWire(0);
-      Wire#(Bit#(1)) wrtwi{0}_scl_outen<-mkDWire(0);
-      Wire#(Bit#(1)) wrtwi{0}_scl_in<-mkDWire(0);
       GenericIOType  twi{0}_sda_io = GenericIOType{{
                  outputval:wrtwi{0}_sda_out,
                  output_en:wrtwi{0}_sda_outen,
@@ -93,6 +90,9 @@ twiwires = '''
                  drivestrength:0,
                  opendrain_en:0
       }};
+      Wire#(Bit#(1)) wrtwi{0}_scl_out<-mkDWire(0);
+      Wire#(Bit#(1)) wrtwi{0}_scl_outen<-mkDWire(0);
+      Wire#(Bit#(1)) wrtwi{0}_scl_in<-mkDWire(0);
       GenericIOType  twi{0}_scl_io = GenericIOType{{
                  outputval:wrtwi{0}_scl_out,
                  output_en:wrtwi{0}_scl_outen,
@@ -107,19 +107,6 @@ twiwires = '''
 
 sdwires = '''
       Wire#(Bit#(1)) wrsd{0}_clk<-mkDWire(0);
-      Wire#(Bit#(1)) wrsd{0}_cmd<-mkDWire(0);
-      Wire#(Bit#(1)) wrsd{0}_d0_out<-mkDWire(0);
-      Wire#(Bit#(1)) wrsd{0}_d0_outen<-mkDWire(0);
-      Wire#(Bit#(1)) wrsd{0}_d0_in<-mkDWire(0);
-      Wire#(Bit#(1)) wrsd{0}_d1_out<-mkDWire(0);
-      Wire#(Bit#(1)) wrsd{0}_d1_outen<-mkDWire(0);
-      Wire#(Bit#(1)) wrsd{0}_d1_in<-mkDWire(0);
-      Wire#(Bit#(1)) wrsd{0}_d2_out<-mkDWire(0);
-      Wire#(Bit#(1)) wrsd{0}_d2_outen<-mkDWire(0);
-      Wire#(Bit#(1)) wrsd{0}_d2_in<-mkDWire(0);
-      Wire#(Bit#(1)) wrsd{0}_d3_out<-mkDWire(0);
-      Wire#(Bit#(1)) wrsd{0}_d3_outen<-mkDWire(0);
-      Wire#(Bit#(1)) wrsd{0}_d3_in<-mkDWire(0);
       GenericIOType  sd{0}_clk_io = GenericIOType{{
                  outputval:wrsd{0}_clk,
                  output_en:1,
@@ -130,6 +117,7 @@ sdwires = '''
                  drivestrength:0,
                  opendrain_en:0
       }};
+      Wire#(Bit#(1)) wrsd{0}_cmd<-mkDWire(0);
       GenericIOType  sd{0}_cmd_io = GenericIOType{{
                  outputval:wrsd{0}_cmd,
                  output_en:1,
@@ -140,6 +128,9 @@ sdwires = '''
                  drivestrength:0,
                  opendrain_en:0
       }};
+      Wire#(Bit#(1)) wrsd{0}_d0_out<-mkDWire(0);
+      Wire#(Bit#(1)) wrsd{0}_d0_outen<-mkDWire(0);
+      Wire#(Bit#(1)) wrsd{0}_d0_in<-mkDWire(0);
       GenericIOType  sd{0}_d0_io = GenericIOType{{
                  outputval:wrsd{0}_d0_out,
                  output_en:wrsd{0}_d0_outen,
@@ -150,6 +141,9 @@ sdwires = '''
                  drivestrength:0,
                  opendrain_en:0
       }};
+      Wire#(Bit#(1)) wrsd{0}_d1_out<-mkDWire(0);
+      Wire#(Bit#(1)) wrsd{0}_d1_outen<-mkDWire(0);
+      Wire#(Bit#(1)) wrsd{0}_d1_in<-mkDWire(0);
       GenericIOType  sd{0}_d1_io = GenericIOType{{
                  outputval:wrsd{0}_d1_out,
                  output_en:wrsd{0}_d1_outen,
@@ -160,6 +154,9 @@ sdwires = '''
                  drivestrength:0,
                  opendrain_en:0
       }};
+      Wire#(Bit#(1)) wrsd{0}_d2_out<-mkDWire(0);
+      Wire#(Bit#(1)) wrsd{0}_d2_outen<-mkDWire(0);
+      Wire#(Bit#(1)) wrsd{0}_d2_in<-mkDWire(0);
       GenericIOType  sd{0}_d2_io = GenericIOType{{
                  outputval:wrsd{0}_d2_out,
                  output_en:wrsd{0}_d2_outen,
@@ -170,6 +167,9 @@ sdwires = '''
                  drivestrength:0,
                  opendrain_en:0
       }};
+      Wire#(Bit#(1)) wrsd{0}_d3_out<-mkDWire(0);
+      Wire#(Bit#(1)) wrsd{0}_d3_outen<-mkDWire(0);
+      Wire#(Bit#(1)) wrsd{0}_d3_in<-mkDWire(0);
       GenericIOType  sd{0}_d3_io = GenericIOType{{
                  outputval:wrsd{0}_d3_out,
                  output_en:wrsd{0}_d3_outen,
@@ -184,10 +184,6 @@ sdwires = '''
 
 jtagwires = '''
       Wire#(Bit#(1)) wrjtag{0}_tdi<-mkDWire(0);
-      Wire#(Bit#(1)) wrjtag{0}_tms<-mkDWire(0);
-      Wire#(Bit#(1)) wrjtag{0}_tclk<-mkDWire(0);
-      Wire#(Bit#(1)) wrjtag{0}_trst<-mkDWire(0);
-      Wire#(Bit#(1)) wrjtag{0}_tdo<-mkDWire(0);
       GenericIOType jtag{0}_tdi_io=GenericIOType{{
                  outputval:0,
                  output_en:0,
@@ -198,17 +194,19 @@ jtagwires = '''
                  drivestrength:0,
                  opendrain_en:0
       }};
-      GenericIOType jtag{0}_tdo_io=GenericIOType{{
-                 outputval:wrjtag{0}_tdo,
-                 output_en:1,
-                 input_en:0,
+      Wire#(Bit#(1)) wrjtag{0}_tms<-mkDWire(0);
+      GenericIOType jtag{0}_tms_io=GenericIOType{{
+                 outputval:0,
+                 output_en:0,
+                 input_en:1,
                  pullup_en:0,
                  pulldown_en:0,
                  pushpull_en:0,
                  drivestrength:0,
                  opendrain_en:0
       }};
-      GenericIOType jtag{0}_tms_io=GenericIOType{{
+      Wire#(Bit#(1)) wrjtag{0}_tclk<-mkDWire(0);
+      GenericIOType jtag{0}_tclk_io=GenericIOType{{
                  outputval:0,
                  output_en:0,
                  input_en:1,
@@ -218,6 +216,7 @@ jtagwires = '''
                  drivestrength:0,
                  opendrain_en:0
       }};
+      Wire#(Bit#(1)) wrjtag{0}_trst<-mkDWire(0);
       GenericIOType jtag{0}_trst_io=GenericIOType{{
                  outputval:0,
                  output_en:0,
@@ -228,10 +227,11 @@ jtagwires = '''
                  drivestrength:0,
                  opendrain_en:0
       }};
-      GenericIOType jtag{0}_tclk_io=GenericIOType{{
-                 outputval:0,
-                 output_en:0,
-                 input_en:1,
+      Wire#(Bit#(1)) wrjtag{0}_tdo<-mkDWire(0);
+      GenericIOType jtag{0}_tdo_io=GenericIOType{{
+                 outputval:wrjtag{0}_tdo,
+                 output_en:1,
+                 input_en:0,
                  pullup_en:0,
                  pulldown_en:0,
                  pushpull_en:0,