[PATCH, rs6000] Rename BU_P10_MISC_2 define to BU_P10_POWERPC64_MISC_2
authorWill Schmidt <will_schmidt@vnet.ibm.com>
Mon, 21 Sep 2020 19:26:43 +0000 (14:26 -0500)
committerWill Schmidt <will_schmidt@vnet.ibm.com>
Thu, 8 Oct 2020 15:39:10 +0000 (10:39 -0500)
Rename our BU_P10_MISC_2 built-in define macro to be
BU_P10_POWERPC64_MISC_2.   This more accurately reflects
that the macro includes the RS6000_BTM_POWERPC64 entry,
and matches the style we used for the P7 equivalent.

gcc/ChangeLog:
* config/rs6000/rs6000-builtin.def (BU_P10_MISC_2): Rename
to BU_P10_POWERPC64_MISC_2.
CFUGED, CNTLZDM, CNTTZDM, PDEPD, PEXTD): Call renamed macro.

gcc/config/rs6000/rs6000-builtin.def

index e91a48ddf5fee83c03a1d4e862bf13c258532785..3eb55f0ae43421451d8c79edcd36acef9c9ef58e 100644 (file)
                     | RS6000_BTC_UNARY),                               \
                    CODE_FOR_ ## ICODE)                 /* ICODE */
 
-#define BU_P10_MISC_2(ENUM, NAME, ATTR, ICODE)                         \
+#define BU_P10_POWERPC64_MISC_2(ENUM, NAME, ATTR, ICODE)               \
   RS6000_BUILTIN_2 (P10_BUILTIN_ ## ENUM,              /* ENUM */      \
                    "__builtin_" NAME,                  /* NAME */      \
                    RS6000_BTM_P10                                      \
@@ -2727,11 +2727,11 @@ BU_P9_OVERLOAD_2 (CMPRB2,       "byte_in_either_range")
 BU_P9_OVERLOAD_2 (CMPEQB,      "byte_in_set")
 \f
 /* Builtins for scalar instructions added in ISA 3.1 (power10).  */
-BU_P10_MISC_2 (CFUGED, "cfuged", CONST, cfuged)
-BU_P10_MISC_2 (CNTLZDM, "cntlzdm", CONST, cntlzdm)
-BU_P10_MISC_2 (CNTTZDM, "cnttzdm", CONST, cnttzdm)
-BU_P10_MISC_2 (PDEPD, "pdepd", CONST, pdepd)
-BU_P10_MISC_2 (PEXTD, "pextd", CONST, pextd)
+BU_P10_POWERPC64_MISC_2 (CFUGED, "cfuged", CONST, cfuged)
+BU_P10_POWERPC64_MISC_2 (CNTLZDM, "cntlzdm", CONST, cntlzdm)
+BU_P10_POWERPC64_MISC_2 (CNTTZDM, "cnttzdm", CONST, cnttzdm)
+BU_P10_POWERPC64_MISC_2 (PDEPD, "pdepd", CONST, pdepd)
+BU_P10_POWERPC64_MISC_2 (PEXTD, "pextd", CONST, pextd)
 
 /* Builtins for vector instructions added in ISA 3.1 (power10).  */
 BU_P10V_AV_2 (VCLRLB, "vclrlb", CONST, vclrlb)