ISA a different much more explicit strategy was taken in Simple-V.
The biggest advantage inherent in Vertical-First is that it is very easy
-to introduce into compilers, because all looping, as far as the architecture
-is concerned, remains expressed as *Scalar assembler*. Whilst Mitch Alsup's
+to introduce into compilers, because all looping, as far as programs
+is concerned, remains expressed as *Scalar assembler*.[^autovec]
+Whilst Mitch Alsup's
VVM advocates auto-vectorisation and is limited in its ability to call
functions, Simple-V's Vertical-First provides explicit control over the
parallelism ("hphint") and also allows for full state to be stored/restored
[^ext001]: Recall that EXT100 to EXT163 is for Public v3.1 64-bit-augmented Operations prefixed by EXT001, for which, from Section 1.6.3, bit 6 is set to 1. This concept is where the above scheme originated. Section 1.6.3 uses the term "defined word" to refer to pre-existing EXT000-EXT063 32-bit instructions so prefixed to create the new numbering EXT100-EXT163, respectively
[^futurevsx]: A future version or other Stakeholder *may* wish to drop Simple-V onto VSX: this would be a separate RFC
[^vsx256]: imagine a hypothetical future VSX-256 using the exact same instructions as VSX. the binary incompatibility introducrd would catastrophically **and retroactively** damage existing IBM POWER8,9,10 hardware's reputation and that of Power ISA overall.
+[^autovec]: Compiler auto-vectorisation for best exploitation of SIMD and Vector ISAs on Scalar programming languages (c, c++) is an Indusstry-wide known-hard decades-long problem. Cross-reference the number of hand-optimised assembler algorithms.
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