(no commit message)

diff --git a/openpower/sv/svp_rewrite/svp64/discussion.mdwn b/openpower/sv/svp_rewrite/svp64/discussion.mdwn
index c7409aebe63291e97ba240914c96979cbc8e6205..6b8afe2bf2d89238bb5f88cd32f5a6f5fb333515 100644 (file)
--- a/openpower/sv/svp_rewrite/svp64/discussion.mdwn
+++ b/openpower/sv/svp_rewrite/svp64/discussion.mdwn
@@ -38,7 +38,8 @@ something like:
 mode:
 
 * zmode: 2 bit src pred zero mode, dest pred zero mode
-* ffirst: 3 bit.  EN (and CR index bit 0-3, applicable when Rc=1)
+* ffirst: 3 bit.  EN (and CR index bit 0-3, applicable when Rc=1).
+   operations that do not have Rc may take bit 1 to mean "invert test"
 
 ## twin predication, CR based.