Add verilog implementation of displayport
authorpham.michael.98@a029fe8ac2da19fcd7269c492cf0410b2e5fd4cc <phammichael98@web>
Sat, 14 Sep 2019 21:01:40 +0000 (22:01 +0100)
committerIkiWiki <ikiwiki.info>
Sat, 14 Sep 2019 21:01:40 +0000 (22:01 +0100)
shakti/displayport.mdwn

index 569518a2ad28a7b2c6340e91c149d89361a59e3c..948a941fb75f9457efa7f488c8e6d190020f6e76 100644 (file)
@@ -1,3 +1,5 @@
 # DisplayPort
 
-<https://github.com/hamsternz/FPGA_DisplayPort>
+Verilog version: <https://github.com/hamsternz/DisplayPort_Verilog>
+
+VHDL version: <https://github.com/hamsternz/FPGA_DisplayPort>