xics: Add missing fusesoc core file
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Fri, 8 May 2020 01:40:39 +0000 (11:40 +1000)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Fri, 8 May 2020 01:41:05 +0000 (11:41 +1000)
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
microwatt.core

index a2d6ab5071c14a0550360e9ee8ee99a3c2c420f5..0d8531e3542d5744d7d92f31337dec2d7924deb9 100644 (file)
@@ -45,6 +45,7 @@ filesets:
       - wishbone_debug_master.vhdl
       - wishbone_bram_wrapper.vhdl
       - soc.vhdl
+      - xics.vhdl
     file_type : vhdlSource-2008
 
   fpga: