(no commit message)

diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index fe16696c6df5e9f3251cb6282aa160fdb3527c1b..1f31f6577e3dd5b1e6d69d46ab9774c08c2b888c 100644 (file)
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -459,11 +459,11 @@ have to work round the fact that the Condition Testing is NOR or NAND.
 The alternative to not having additional behavioural inversion
 (`SNZ`, `VSb`, `CTi`) would be to have a second (unconditional)
 branch directly after the first, which the first branch jumps over.
-This contrived construct is avoided by the behavioural inversion bits.
+This contrivance is avoided by the behavioural inversion bits.
 
 # Pseudocode and examples
 
-For comparative purposes this is a copy of the v3.0B bc pseudocode,
+For comparative purposes this is a copy of the v3.0B `bc` pseudocode,
 noting that M and AA have not been added to the SVP64 versions
 for simplicity of illustration.  ctr_ok does not appear in the SVP64
 versions because of the way that CTRtest Mode interacts.