mention compliancy levels not Libre-SOC

diff --git a/svp64-primer/summary.tex b/svp64-primer/summary.tex
index 0b613e0c3ba4d8c2ef168f1e4c716ac016cdc65a..3c56ea286cc2db65c6fbc54c2307e268befded19 100644 (file)
--- a/svp64-primer/summary.tex
+++ b/svp64-primer/summary.tex
@@ -134,7 +134,7 @@ Floating Point registers, similar to \acs{MMX}.
 
 Simple-V's "Vector" Registers are specifically designed to fit on top of
 the Scalar (GPR, FPR) register files, which are extended from the default
-of 32, to 128 entries in the Libre-SOC implementation.  This is a primary
+of 32, to 128 entries in the high-end Compliancy Levels.  This is a primary
 reason why Simple-V can be added on top of an existing Scalar ISA, and
 \textit{in particular} why there is no need to add Vector Registers or
 Vector instructions.