(no commit message)

diff --git a/3d_gpu/architecture/dynamic_simd/slice.mdwn b/3d_gpu/architecture/dynamic_simd/slice.mdwn
index f17648ca010c84b6d4c1c62c7b1b8b08cb833143..59f44212f56267836afff9d415e23b67509406b3 100644 (file)
--- a/3d_gpu/architecture/dynamic_simd/slice.mdwn
+++ b/3d_gpu/architecture/dynamic_simd/slice.mdwn
@@ -175,11 +175,13 @@ take signal a, of 16 bits, each bit being numbered in hexadecimal:
             |        |        |
     AfAeAdAc AbAaA9A8 A7A6A5A4 A3A2A1A0
 
-and take a slice a[0:2] to create 3-bit values, where padding is
+and take a slice a[0:1] to create 3-bit values, where padding is
 specified by "x", at each elwid:
 
     elwid        |        |        |
-    0b00 AfAeAdAc AbAaA9A8 A7A6A5A4 A3A2A1A0
+    0b00 x x x x  x x x x  x x x x  x A2A1A0
+    0b01 x x x x  x AaA9A8 x x x x  x A2A1A0
+    0b10 x AeAdAc x AaA9A8 x A6A5A4 x A2A1A0
 
 Illustrating the case where a Sliced (fixed element width) SimdSignal
 is added to one which has variable-length elements that take up the