clarify vertical-first on REMAP

diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn
index b694ee4f39a5d82b0e71c4030fd9d383f768f0db..74b83766ac44305664dd1acfedf925a0a455bda1 100644 (file)
--- a/openpower/sv/rfc/ls001.mdwn
+++ b/openpower/sv/rfc/ls001.mdwn
@@ -530,7 +530,11 @@ temporary registers to compute results that have a Vector source
 or destination or both.
 Contrast this with a Standard Horizontal-First Vector ISA where the only
 way to perform Vectorised Complex Arithmetic would be to add Complex Vector
-Arithmetic operations.
+Arithmetic operations, because due to the Horizontal (element-level)
+progression there is no way to utilise intermediary temporary (scalar)
+variables.[^complex]
+
+[^complex]: a case could be made for constructing Complex number arithmetic using multiple sequential Horizontal-First (Cray-style Vector) instructions. This may not be convenient in the least when REMAP is involved (such as Parallel Reduction of Complex Multiply).
 
 * **DCT/FFT** REMAP brings more capability than TI's MSP-Series DSPs and
   Qualcom Hexagon DSPs, and is not restricted to Integer or FP.