+2020-11-03 Tobias Burnus <tobias@codesourcery.com>
+
+ * gcc-changelog/git_email.py: Add unidiff_supports_renaming check.
+
+2020-11-03 Martin Liska <mliska@suse.cz>
+
+ * gcc-changelog/setup.cfg: New file.
+
2020-10-30 Martin Liska <mliska@suse.cz>
* gcc-changelog/git_commit.py: Handle empty groups in
+2020-11-03 Jan Hubicka <hubicka@ucw.cz>
+
+ PR ipa/97695
+ * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Fix ICE with
+ in dumping code.
+ (cgraph_node::remove): Save clone info before releasing it and pass it
+ to unregister.
+ * cgraph.h (symtab_node::unregister): Add clone_info parameter.
+ (cgraph_clone::unregister): Likewise.
+ * cgraphclones.c (cgraph_node::find_replacement): Copy clone info
+ * symtab-clones.cc (clone_infos_t::duplicate): Remove.
+ (clone_info::get_create): Simplify.
+ * symtab.c (symtab_node::unregister): Pass around clone info.
+ * varpool.c (varpool_node::remove): Update.
+
+2020-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-low.c (scan_omp_for) <OpenACC>: Use proper location to
+ 'inform' of enclosing parent compute construct.
+
+2020-11-03 Jan Hubicka <hubicka@ucw.cz>
+
+ PR ipa/97698
+ * cgraphclones.c (duplicate_thunk_for_node): Check that info is
+ non-NULL.
+
+2020-11-03 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (ix86_function_arg_regno_p): Use up to
+ SSE_REGPARM_MAX registers to pass function parameters
+ for 32bit Mach-O targets.
+ * config/i386/i386.h (X86_32_MMX_REGPARM_MAX): New macro.
+ (MMX_REGPARM_MAX): Use it.
+
+2020-11-03 Dennis Zhang <dennis.zhang@arm.com>
+
+ * config/aarch64/aarch64-simd-builtins.def (vget_lo_half): New entry.
+ (vget_hi_half): Likewise.
+ * config/aarch64/aarch64-simd.md (aarch64_vget_lo_halfv8bf): New entry.
+ (aarch64_vget_hi_halfv8bf): Likewise.
+ * config/aarch64/arm_neon.h (vget_low_bf16): New intrinsic.
+ (vget_high_bf16): Likewise.
+
+2020-11-03 Yang Yang <yangyang305@huawei.com>
+
+ * cgraph.h (struct cgraph_simd_clone): Change field "simdlen" of
+ struct cgraph_simd_clone from unsigned int to poly_uint64.
+ * config/aarch64/aarch64.c
+ (aarch64_simd_clone_compute_vecsize_and_simdlen): adaptation of
+ operations on "simdlen".
+ * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
+ Printf formats update.
+ * gengtype.c (main): Handle poly_uint64.
+ * omp-simd-clone.c (simd_clone_mangle): Likewise.Re
+ (simd_clone_adjust_return_type): Likewise.
+ (create_tmp_simd_array): Likewise.
+ (simd_clone_adjust_argument_types): Likewise.
+ (simd_clone_init_simd_arrays): Likewise.
+ (ipa_simd_modify_function_body): Likewise.
+ (simd_clone_adjust): Likewise.
+ (expand_simd_clones): Likewise.
+ * poly-int-types.h (vector_unroll_factor): New macro.
+ * poly-int.h (constant_multiple_p): Add two-argument versions.
+ * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97623
+ * params.opt (-param=max-pre-hoist-insert-iterations): New.
+ * doc/invoke.texi (max-pre-hoist-insert-iterations): Document.
+ * tree-ssa-pre.c (insert): Do at most max-pre-hoist-insert-iterations
+ hoist insert iterations.
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/97579
+ * gimple-isel.cc (gimple_expand_vec_cond_expr): Use
+ the correct types for the vcond_mask/vec_cmp optab queries.
+
+2020-11-03 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-cache.cc (ssa_global_cache::get_global_range): Return
+ true if there was a previous range set.
+ (ranger_cache::ranger_cache): Take a gimple_ranger parameter.
+ (ranger_cache::set_global_range): Propagate the value if updating.
+ (ranger_cache::propagate_cache): Renamed from iterative_cache_update.
+ (ranger_cache::propagate_updated_value): New. Split from:
+ (ranger_cache::fill_block_cache): Split out value propagator.
+ * gimple-range-cache.h (ssa_global_cache): Update prototypes.
+ (ranger_cache): Update prototypes.
+
+2020-11-03 Andrew MacLeod <amacleod@redhat.com>
+
+ * gimple-range-cache.h (block_range_cache): Add new entry point.
+ (ranger_cache): Privatize global abnd block cache members.
+ * gimple-range-cache.cc (ssa_block_ranges::set_bb_range): Add bounds
+ check.
+ (ssa_block_ranges::set_bb_varying): Ditto.
+ (ssa_block_ranges::get_bb_range): Ditto.
+ (ssa_block_ranges::bb_range_p): Ditto.
+ (block_range_cache::get_block_ranges): Fix formatting.
+ (block_range_cache::query_block_ranges): New.
+ (block_range_cache::get_bb_range): Use Query_block_ranges.
+ (block_range_cache::bb_range_p): Ditto.
+ (ranger_cache::dump): New.
+ (ranger_cache::get_global_range): New.
+ (ranger_cache::set_global_range): New.
+ * gimple-range.cc (gimple_ranger::range_of_expr): Use new API.
+ (gimple_ranger::range_of_stmt): Ditto.
+ (gimple_ranger::export_global_ranges): Ditto.
+ (gimple_ranger::dump): Ditto.
+
+2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ * fold-const.c (getbyterep): Remove duplicated statement.
+
+2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ PR target/97205
+ * cfgexpand.c (align_local_variable): Make SSA_NAMEs
+ at least MODE_ALIGNED.
+ (expand_one_stack_var_at): Increase MEM_ALIGN for SSA_NAMEs.
+
+2020-11-03 Zhiheng Xie <xiezhiheng@huawei.com>
+ Nannan Zheng <zhengnannan@huawei.com>
+
+ * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
+ for AES/SHA/SM3/SM4 intrinsics.
+
+2020-11-03 Zhiheng Xie <xiezhiheng@huawei.com>
+ Nannan Zheng <zhengnannan@huawei.com>
+
+ * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
+ for compare intrinsics.
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ * dwarf2out.c (maybe_create_die_with_external_ref): Remove
+ hashtable entry.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/arm/arm_neon.h (vst2_lane_bf16, vst2q_lane_bf16)
+ (vst3_lane_bf16, vst3q_lane_bf16, vst4_lane_bf16)
+ (vst4q_lane_bf16): New intrinsics.
+ * config/arm/arm_neon_builtins.def: Touch it for:
+ __builtin_neon_vst2_lanev4bf, __builtin_neon_vst2_lanev8bf,
+ __builtin_neon_vst3_lanev4bf, __builtin_neon_vst3_lanev8bf,
+ __builtin_neon_vst4_lanev4bf,__builtin_neon_vst4_lanev8bf.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/arm/arm_neon.h (vld2_lane_bf16, vld2q_lane_bf16)
+ (vld3_lane_bf16, vld3q_lane_bf16, vld4_lane_bf16)
+ (vld4q_lane_bf16): Add intrinsics.
+ * config/arm/arm_neon_builtins.def: Touch for:
+ __builtin_neon_vld2_lanev4bf, __builtin_neon_vld2_lanev8bf,
+ __builtin_neon_vld3_lanev4bf, __builtin_neon_vld3_lanev8bf,
+ __builtin_neon_vld4_lanev4bf, __builtin_neon_vld4_lanev8bf.
+ * config/arm/iterators.md (VQ_HS): Add V8BF to the iterator.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/arm/arm_neon.h (vst1_bf16, vst1q_bf16): Add intrinsics.
+ * config/arm/arm_neon_builtins.def : Touch for:
+ __builtin_neon_vst1v4bf, __builtin_neon_vst1v8bf.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/arm/arm-builtins.c (VAR14): Define macro.
+ * config/arm/arm_neon_builtins.def: Touch for:
+ __builtin_neon_vld1v4bf, __builtin_neon_vld1v8bf.
+ * config/arm/arm_neon.h (vld1_bf16, vld1q_bf16): Add intrinsics.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/arm/arm_neon.h (vst1_lane_bf16, vst1q_lane_bf16): Add
+ intrinsics.
+ * config/arm/arm_neon_builtins.def (STORE1LANE): Add v4bf, v8bf.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * config/arm/arm_neon_builtins.def: Add to LOAD1LANE v4bf, v8bf.
+ * config/arm/arm_neon.h (vld1_lane_bf16, vld1q_lane_bf16): Add
+ intrinsics.
+
+2020-11-03 Dennis Zhang <dennis.zhang@arm.com>
+
+ * config/aarch64/aarch64-simd-builtins.def(vbfcvt): New entry.
+ (vbfcvt_high, bfcvt): Likewise.
+ * config/aarch64/aarch64-simd.md(aarch64_vbfcvt<mode>): New entry.
+ (aarch64_vbfcvt_highv8bf, aarch64_bfcvtsf): Likewise.
+ * config/aarch64/arm_bf16.h (vcvtah_f32_bf16): New intrinsic.
+ * config/aarch64/arm_neon.h (vcvt_f32_bf16): Likewise.
+ (vcvtq_low_f32_bf16, vcvtq_high_f32_bf16): Likewise.
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ PR bootstrap/97666
+ * tree-vect-slp.c (vect_build_slp_tree_2): Scale
+ allocation of skip_args by sizeof (bool).
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/80928
+ * tree-vect-loop.c (vectorizable_induction): SLP vectorize
+ nested inductions.
+
+2020-11-03 Jan Hubicka <hubicka@ucw.cz>
+
+ PR ipa/97578
+ * ipa-inline-transform.c (maybe_materialize_called_clones): New
+ function.
+ (inline_transform): Use it.
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97678
+ * tree-vect-slp.c (vect_build_slp_tree_2): Do not track
+ the initial values of inductions when not nested.
+ * tree-vect-loop.c (vectorizable_induction): Look at
+ PHI node initial values again for SLP and not nested
+ inductions. Handle LOOP_VINFO_MASK_SKIP_NITERS and cost
+ invariants.
+
+2020-11-03 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/sse.md (aes<aeswideklvariant>u8):
+ Do not use xmm_regs array. Fix whitespace.
+
+2020-11-03 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386-expand.c (ix86_expand_builtin): Fix comment.
+
+2020-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-low.c (scan_omp_for) <OpenACC>: Move earlier inconsistent
+ nested 'reduction' clauses checking.
+
+2020-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * omp-low.c (scan_omp_for) <OpenACC>: More precise diagnostics for
+ 'gang', 'worker', 'vector' clauses with arguments only allowed in
+ 'kernels' regions.
+
+2020-11-03 Kewen Lin <linkw@gcc.gnu.org>
+
+ PR tree-optimization/96789
+ * function.h (struct function): New member unsigned pending_TODOs.
+ * passes.c (class pass_pre_slp_scalar_cleanup): New class.
+ (make_pass_pre_slp_scalar_cleanup): New function.
+ (pass_data_pre_slp_scalar_cleanup): New pass data.
+ * passes.def: (pass_pre_slp_scalar_cleanup): New pass, add
+ pass_fre and pass_dse as its children.
+ * timevar.def (TV_SCALAR_CLEANUP): New timevar.
+ * tree-pass.h (PENDING_TODO_force_next_scalar_cleanup): New
+ pending TODO flag.
+ (make_pass_pre_slp_scalar_cleanup): New declare.
+ * tree-ssa-loop-ivcanon.c (tree_unroll_loops_completely_1):
+ Once any outermost loop gets unrolled, flag cfun pending_TODOs
+ PENDING_TODO_force_next_scalar_cleanup on.
+
2020-11-03 Dennis Zhang <dennis.zhang@arm.com>
* config/aarch64/aarch64-simd-builtins.def (vget_lo_half): New entry.
+2020-11-03 Nathan Sidwell <nathan@acm.org>
+
+ * c.opt (MQ,MT): Reword description to be make-agnostic.
+
2020-11-02 Nathan Sidwell <nathan@acm.org>
* c-opts.c (c_common_post_options): Move var decl to its
+2020-11-03 Jason Merrill <jason@redhat.com>
+
+ * tree.c (is_byte_access_type): Don't use char_type_p.
+
+2020-11-03 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/97663
+ * parser.c (cp_parser_init_declarator): Don't try to parse
+ C++17 deduction guides if there are any type specifiers even when
+ type is NULL.
+
+2020-11-03 Kamlesh Kumar <kamleshbhalui@gmail.com>
+ Jason Merrill <jason@redhat.com>
+
+ PR c++/97453
+ DR2303
+ * pt.c (get_template_base): Consider closest base in template
+ deduction when base of base also matches.
+
+2020-11-03 Nathan Sidwell <nathan@acm.org>
+
+ * pt.c (tsubst_expr): Simplify using decl instantiation, add
+ asserts.
+
+2020-11-03 Nathan Sidwell <nathan@acm.org>
+
+ * class.c (copy_fndecl_with_name): Always not top level.
+ (build_cdtor_clones): Add update_methods parm, use it to
+ conditionally update the method vec. Return void
+ (clone_cdtor): Adjust.
+ (clone_constructors_and_destructors): Adjust comment.
+
+2020-11-03 Nathan Sidwell <nathan@acm.org>
+
+ * pt.c (primary_template_specialization_p): Use
+ VAR_OR_FUNCTION_DECL_P.
+ (tsubst_template_decl): Check for FUNCTION_DECL, not !TYPE && !VAR
+ for registering a specialization.
+
+2020-11-03 Nathan Sidwell <nathan@acm.org>
+
+ * cp-tree.h (fixup_deferred_exception_variants): Declare.
+ * parser.c (cp_parser_class_specifier_1): Call it when
+ completing deferred parses rather than creating a variant.
+ (cp_parser_member_declaration): Move comment from ...
+ (cp_parser_noexcept_specification_opt): ... here. Refactor the
+ deferred parse.
+ * tree.c (fixup_deferred_exception_variants): New.
+
+2020-11-03 Nathan Sidwell <nathan@acm.org>
+
+ * pt.c (tsubst_lambda_expr): Reorder extra-scope handling to match
+ the non-template case.
+ (instantiate_body): Move a couple of declarations to their
+ initializers.
+
+2020-11-03 Nathan Sidwell <nathan@acm.org>
+
+ * decl.c (duplicate_decls): Return error_mark_node fo extern-c
+ mismatch.
+
+2020-11-03 Marek Polacek <polacek@redhat.com>
+
+ * constexpr.c (potential_constant_expression_1): Treat
+ __PRETTY_FUNCTION__ inside a template function as
+ potentially-constant.
+ * pt.c (uses_template_parms): Call
+ instantiation_dependent_expression_p instead of
+ value_dependent_expression_p.
+ (instantiation_dependent_expression_p): Check
+ potential_constant_expression before calling
+ value_dependent_expression_p.
+
+2020-11-03 Marek Polacek <polacek@redhat.com>
+
+ PR c++/97632
+ * init.c (build_new_1): Disable -Winit-list-lifetime for an unevaluated
+ operand.
+
+2020-11-03 Nathan Sidwell <nathan@acm.org>
+
+ * tree.c (bind_template_template_parm): Mark the parm as a
+ template parm.
+ (cp_tree_equal): Refactor CALL_EXPR. Use comp_template_args for
+ TREE_VECs.
+
+2020-11-03 Nathan Sidwell <nathan@acm.org>
+
+ * rtti.c (init_rtti_processing): Move var decl to its init.
+ (get_tinfo_decl): Likewise. Break out creation to called helper
+ ...
+ (get_tinfo_decl_direct): ... here.
+ (build_dynamic_cast_1): Move var decls to their initializers.
+ (tinfo_base_init): Set decl's location to BUILTINS_LOCATION.
+ (get_tinfo_desc): Only push ABI namespace when needed. Set type's
+ context.
+
2020-11-02 Nathan Sidwell <nathan@acm.org>
* decl.c (start_decl_1): Refactor declarations. Fixup some
+2020-11-03 Nathan Sidwell <nathan@acm.org>
+
+ * cpp.c (gfc_cpp_add_dep): Only add dependency if we're recording
+ them.
+ (gfc_cpp_init): Likewise for target.
+
+2020-11-03 Tobias Burnus <tobias@codesourcery.com>
+
+ * decl.c (ext_attr_list): Add EXT_ATTR_DEPRECATED.
+ * gfortran.h (ext_attr_id_t): Ditto.
+ * gfortran.texi (GCC$ ATTRIBUTES): Document it.
+ * resolve.c (resolve_variable, resolve_function,
+ resolve_call, resolve_values): Show -Wdeprecated-declarations warning.
+ * trans-decl.c (add_attributes_to_decl): Skip those
+ with no middle_end_name.
+
+2020-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ PR fortran/92793
+ * trans-openmp.c (gfc_trans_omp_clauses): More precise location
+ information for OpenACC 'gang', 'worker', 'vector' clauses with
+ argument.
+
2020-11-02 Thomas Schwinge <thomas@codesourcery.com>
PR fortran/92793
+2020-11-03 Jan Hubicka <jh@suse.cz>
+
+ * gcc.c-torture/execute/pr97695.c: New test.
+
+2020-11-03 Jason Merrill <jason@redhat.com>
+
+ * g++.dg/Wclass-memaccess.C: Check that signed char and
+ char16_t aren't treated as byte-access types.
+
+2020-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * c-c++-common/goacc/pr92793-1.c: Extend.
+ * gfortran.dg/goacc/pr92793-1.f90: Likewise.
+
+2020-11-03 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/97663
+ * g++.dg/cpp1z/class-deduction75.C: New test.
+
+2020-11-03 Kamlesh Kumar <kamleshbhalui@gmail.com>
+
+ * g++.dg/DRs/dr2303.C: New test.
+
+2020-11-03 Olivier Hainque <hainque@adacore.com>
+
+ * gcc.target/powerpc/pr67789.c: Add
+ dg-require-effective-target fpic.
+ * gcc.target/powerpc/pr83629.c: Likewise.
+ * gcc.target/powerpc/pr84112.c: Likewise. Remove
+ a superflous target test in the dg-do compile
+ directive while at it.
+
+2020-11-03 Dennis Zhang <denzha01@e124712.cambridge.arm.com>
+
+ * gcc.target/aarch64/advsimd-intrinsics/bf16_get.c: New test.
+ * gcc.target/aarch64/advsimd-intrinsics/bf16_get-be.c: New test.
+
+2020-11-03 Marek Polacek <polacek@redhat.com>
+
+ PR c++/97632
+ * g++.dg/warn/Winit-list4.C: New test.
+
+2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ PR target/97205
+ * gcc.c-torture/compile/pr97205.c: New test.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_bf16_indices_1.c:
+ Run it also for arm-*-*.
+ * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_bf16_indices_1.c:
+ Likewise.
+ * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_bf16_indices_1.c:
+ Likewise.
+ * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_bf16_indices_1.c:
+ Likewise.
+ * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_bf16_indices_1.c:
+ Likewise.
+ * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_bf16_indices_1.c:
+ Likewise.
+ * gcc.target/arm/simd/vstn_lane_bf16_1.c: New test.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_bf16_indices_1.c:
+ Run it also for the arm backend.
+ * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_bf16_indices_1.c:
+ Likewise.
+ * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_bf16_indices_1.c:
+ Likewise.
+ * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_bf16_indices_1.c:
+ Likewise.
+ * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_bf16_indices_1.c:
+ Likewise.
+ * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_bf16_indices_1.c:
+ Likewise.
+ * gcc.target/arm/simd/vldn_lane_bf16_1.c: New test.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * gcc.target/arm/simd/vst1_bf16_1.c: New test.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * gcc.target/arm/simd/vld1_bf16_1.c: New test.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * gcc.target/arm/simd/vst1_lane_bf16_1.c: New testcase.
+ * gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c: Likewise.
+ * gcc.target/arm/simd/vst1_lane_bf16_indices_1.c: Likewise.
+
+2020-11-03 Andrea Corallo <andrea.corallo@arm.com>
+
+ * gcc.target/arm/simd/vld1_lane_bf16_1.c: New testcase.
+ * gcc.target/arm/simd/vld1_lane_bf16_indices_1.c: Likewise.
+ * gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c: Likewise.
+
+2020-11-03 Dennis Zhang <denzha01@e124712.cambridge.arm.com>
+
+ * gcc.target/aarch64/advsimd-intrinsics/bfcvt-compile.c
+ (test_vcvt_f32_bf16, test_vcvtq_low_f32_bf16): New tests.
+ (test_vcvtq_high_f32_bf16, test_vcvth_f32_bf16): Likewise.
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/80928
+ * gcc.dg/vect/vect-outer-slp-2.c: New testcase.
+ * gcc.dg/vect/vect-outer-slp-3.c: Likewise.
+
+2020-11-03 Uroš Bizjak <ubizjak@gmail.com>
+
+ * gcc.target/i386/zero-scratch-regs-1.c: Add ia32 target
+ selector where appropriate. Improve scan-assembler regexp.
+ * gcc.target/i386/zero-scratch-regs-2.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-3.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-4.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-5.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-6.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-7.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-8.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-9.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-10.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-13.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-14.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-15.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-16.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-17.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-18.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-19.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-20.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-21.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-22.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-23.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-24.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-25.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-26.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-27.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-28.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-29.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-30.c: Ditto.
+ * gcc.target/i386/zero-scratch-regs-31.c: Ditto.
+
+2020-11-03 Olivier Hainque <hainque@adacore.com>
+
+ * gcc.dg/tree-ssa/pr71077.c: Add
+ dg-require-effective-target lto.
+
+2020-11-03 Olivier Hainque <hainque@adacore.com>
+
+ * gcc.target/i386/pr45352-1.c: Add dg-require-effective-target fpic.
+ * gcc.target/i386/pr47602.c: Likewise.
+ * gcc.target/i386/pr55151.c: Likewise.
+ * gcc.target/i386/pr55458.c: Likewise.
+ * gcc.target/i386/pr56348.c: Likewise.
+ * gcc.target/i386/pr57097.c: Likewise.
+ * gcc.target/i386/pr65753.c: Likewise.
+ * gcc.target/i386/pr65915.c: Likewise.
+ * gcc.target/i386/pr66232-5.c: Likewise.
+ * gcc.target/i386/pr66334.c: Likewise.
+ * gcc.target/i386/pr66819-2.c: Likewise.
+ * gcc.target/i386/pr67265.c: Likewise.
+ * gcc.target/i386/pr81481.c: Likewise.
+ * gcc.target/i386/pr83994.c: Likewise.
+
+2020-11-03 Jan Hubicka <hubicka@ucw.cz>
+
+ * gcc.c-torture/compile/pr97578.c: New test.
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ PR testsuite/97688
+ * gcc.dg/vect/tree-vect.h (check_vect): Fix the x86 cpuid
+ check to always specify subleaf zero.
+
+2020-11-03 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/97678
+ * gcc.dg/vect/pr97678.c: New testcase.
+
+2020-11-03 Tobias Burnus <tobias@codesourcery.com>
+
+ * gfortran.dg/attr_deprecated.f90: New test.
+
+2020-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * c-c++-common/goacc/nested-reductions-1-kernels.c: Extend.
+ * c-c++-common/goacc/nested-reductions-2-kernels.c: Likewise.
+ * gfortran.dg/goacc/nested-reductions-1-kernels.f90: Likewise.
+ * gfortran.dg/goacc/nested-reductions-2-kernels.f90: Likewise.
+
+2020-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * c-c++-common/goacc/nested-reductions.c: Split file into...
+ * c-c++-common/goacc/nested-reductions-1-kernels.c: ... this...
+ * c-c++-common/goacc/nested-reductions-1-parallel.c: ..., this...
+ * c-c++-common/goacc/nested-reductions-1-routine.c: ..., and this.
+ * c-c++-common/goacc/nested-reductions-warn.c: Split file into...
+ * c-c++-common/goacc/nested-reductions-2-kernels.c: ... this...
+ * c-c++-common/goacc/nested-reductions-2-parallel.c: ..., this...
+ * c-c++-common/goacc/nested-reductions-2-routine.c: ..., and this.
+ * gfortran.dg/goacc/nested-reductions.f90: Split file into...
+ * gfortran.dg/goacc/nested-reductions-1-kernels.f90: ... this...
+ * gfortran.dg/goacc/nested-reductions-1-parallel.f90: ..., this...
+ * gfortran.dg/goacc/nested-reductions-1-routine.f90: ..., and
+ this.
+ * gfortran.dg/goacc/nested-reductions-warn.f90: Split file into...
+ * gfortran.dg/goacc/nested-reductions-2-kernels.f90: ... this...
+ * gfortran.dg/goacc/nested-reductions-2-parallel.f90: ..., this...
+ * gfortran.dg/goacc/nested-reductions-2-routine.f90: ..., and
+ this.
+
+2020-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ PR fortran/92793
+ * gfortran.dg/goacc/pr92793-1.f90: Adjust.
+
+2020-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * c-c++-common/goacc/pr92793-1.c: Extend.
+ * gfortran.dg/goacc/pr92793-1.f90: Likewise.
+
+2020-11-03 Kewen Lin <linkw@gcc.gnu.org>
+
+ PR tree-optimization/96789
+ * gcc.dg/tree-ssa/ssa-dse-28.c: Adjust.
+ * gcc.dg/tree-ssa/ssa-dse-29.c: Likewise.
+ * gcc.dg/vect/bb-slp-41.c: Likewise.
+ * gcc.dg/tree-ssa/pr96789.c: New test.
+
2020-11-03 Dennis Zhang <dennis.zhang@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/bf16_get.c: New test.
+2020-11-03 Nathan Sidwell <nathan@acm.org>
+
+ * lex.c (cpp_peek_token): Do not peek past CPP_PRAGMA.
+ (_cpp_lex_direct): Handle EOF in pragma when setting need_line,
+ not when needing a line.
+
+2020-11-03 Nathan Sidwell <nathan@acm.org>
+
+ * lex.c (_cpp_clean_line): Fix DOS off-by-one error.
+
+2020-11-03 Nathan Sidwell <nathan@acm.org>
+
+ * init.c (cpp_read_main_file): Use cpp_get_deps result.
+
+2020-11-03 Nathan Sidwell <nathan@acm.org>
+
+ * include/mkdeps.h: Include cpplib.h
+ (deps_write): Adjust first parm type.
+ * mkdeps.c: Include internal.h
+ (make_write): Adjust first parm type. Check phony option
+ directly.
+ (deps_write): Adjust first parm type.
+ * init.c (cpp_read_main_file): Use get_deps.
+ * directives.c (cpp_get_deps): Check option before initializing.
+
2020-11-02 Nathan Sidwell <nathan@acm.org>
* internal.h (_cpp_notify_macro_use): Add location parm.
+2020-11-03 Pat Bernardi <bernardi@adacore.com>
+ Olivier Hainque <hainque@adacore.com>
+
+ * config.host (aarch64-vxworks7*, tmake_file): Add
+ ${cpu_type}/t-lse and t-slibgcc-libgcc.
+
+2020-11-03 Martin Storsjö <martin@martin.st>
+
+ * unwind-seh.c (_Unwind_Backtrace): Set the ra and cfa pointers
+ before calling the callback.
+
2020-10-30 Olivier Hainque <hainque@adacore.com>
Douglas Rupp <rupp@adacore.com>
Pat Bernardi <bernardi@adacore.com>
+2020-11-03 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/std/syncstream: Include <bits/std_mutex.h>
+ unconditionally.
+
+2020-11-03 François Dumont <fdumont@gcc.gnu.org>
+
+ * config/abi/pre/gnu-versioned-namespace.ver:
+ Add __istream_extract and _Safe_local_iterator_base::_M_attach_single
+ symbols.
+
+2020-11-03 Jonathan Wakely <jwakely@redhat.com>
+
+ * src/c++11/mutex.cc [_GLIBCXX_HAVE_TLS] (__once_proxy): Define
+ separately for TLS targets.
+ [!_GLIBCXX_HAVE_TLS] (__get_once_functor_lock_ptr): Replace with ...
+ (set_lock_ptr): ... this. Set new value and return previous
+ value.
+ [!_GLIBCXX_HAVE_TLS] (__set_once_functor_lock_ptr): Adjust to
+ use set_lock_ptr.
+ [!_GLIBCXX_HAVE_TLS] (__once_proxy): Likewise.
+
+2020-11-03 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/55394
+ PR libstdc++/66146
+ PR libstdc++/84323
+ * config/abi/pre/gnu.ver (GLIBCXX_3.4.29): Add new symbols.
+ * include/std/mutex [!_GLIBCXX_HAS_GTHREADS] (once_flag): Define
+ even when gthreads is not supported.
+ (once_flag::_M_once) [_GLIBCXX_HAVE_LINUX_FUTEX]: Change type
+ from __gthread_once_t to int.
+ (once_flag::_M_passive(), once_flag::_M_activate())
+ (once_flag::_M_finish(bool), once_flag::_Active_execution):
+ Define new members for futex and non-threaded implementation.
+ [_GLIBCXX_HAS_GTHREADS] (once_flag::_Prepare_execution): New
+ RAII helper type.
+ (call_once): Use new members of once_flag.
+ * src/c++11/mutex.cc (std::once_flag::_M_activate): Define.
+ (std::once_flag::_M_finish): Define.
+ * testsuite/30_threads/call_once/39909.cc: Do not require
+ gthreads.
+ * testsuite/30_threads/call_once/49668.cc: Likewise.
+ * testsuite/30_threads/call_once/60497.cc: Likewise.
+ * testsuite/30_threads/call_once/call_once1.cc: Likewise.
+ * testsuite/30_threads/call_once/dr2442.cc: Likewise.
+ * testsuite/30_threads/call_once/once_flag.cc: Add test for
+ constexpr constructor.
+ * testsuite/30_threads/call_once/66146.cc: New test.
+ * testsuite/30_threads/call_once/constexpr.cc: Removed.
+ * testsuite/30_threads/once_flag/cons/constexpr.cc: Removed.
+
+2020-11-03 Jonathan Yong <10walls@gmail.com>
+
+ * src/Makefile.am (libstdc___la_LINK): Add lt_host_flags.
+ * src/Makefile.in: Regenerate.
+
2020-11-02 Thomas Rodgers <trodgers@redhat.com>
* doc/doxygen/user.cfg.in (INPUT): Add new header.
projects / gcc.git / commitdiff