From: Andrey Miroshnikov Date: Wed, 29 Jun 2022 20:22:41 +0000 (+0100) Subject: Added detail about PowerISA and SVP64 binaries X-Git-Tag: opf_rfc_ls005_v1~1460 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0dd2d556ce833fb8183d1051672065ad1833a063;p=libreriscv.git Added detail about PowerISA and SVP64 binaries --- diff --git a/docs/pypowersim.mdwn b/docs/pypowersim.mdwn index 651895036..d27b12811 100644 --- a/docs/pypowersim.mdwn +++ b/docs/pypowersim.mdwn @@ -17,13 +17,14 @@ succesfully, you need to dump the memory contents and inspect them. ## Pypowersim - PowerISA Simulator Pypowersim is a PowerISA simulator written and Python. -PowerISA assembler code is decoded by a given ISA class instance, and a -simulation is managed cycle by cycle, for instruction and memory debugging. -Use of QEMU as a co-simulator is also supported for verifying the binaries -run identically. - -To find out about input arg information, run the script with "-h/--help" or -no arguments to get the help message: +PowerISA binaries are decoded by a given ISA class instance. +SVP64 binaries are also supported. Simulation is managed cycle by cycle, +for instruction and memory debugging. +Use of QEMU as a co-simulator is also supported for verifying the +binaries run identically. + +To find out about input arg information, run the script with "-h/--help" +or no arguments to get the help message: * python3 openpower-isa/src/openpower/decoder/isa/pypowersim.py