From: Jacob Lifshay Date: Thu, 25 Jul 2019 06:41:01 +0000 (-0700) Subject: Revert "reduce LHS for RSQRT by a factor of fract_width and" X-Git-Tag: ls180-24jan2020~731 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=11a7d94154db8f7b3bda18396e8166cfe0bb7788;p=ieee754fpu.git Revert "reduce LHS for RSQRT by a factor of fract_width and" This reverts commit c6149c74b64a00d0ca8059468e8709ccb200e301. --- diff --git a/src/ieee754/div_rem_sqrt_rsqrt/core.py b/src/ieee754/div_rem_sqrt_rsqrt/core.py index 1c1e4c29..b62a9574 100644 --- a/src/ieee754/div_rem_sqrt_rsqrt/core.py +++ b/src/ieee754/div_rem_sqrt_rsqrt/core.py @@ -78,6 +78,7 @@ class DivPipeCoreOperation(enum.Enum): DP = DivPipeCoreOperation + class DivPipeCoreInputData: """ input data type for ``DivPipeCore``. @@ -249,7 +250,7 @@ class DivPipeCoreSetupStage(Elaboratable): self.i.divisor_radicand << (self.core_config.fract_width * 2)) with m.Else(): # DivPipeCoreOperation.RSqrtRem m.d.comb += self.o.compare_lhs.eq( - 1 << (self.core_config.fract_width * 2)) # XXX reduced from 3 + 1 << (self.core_config.fract_width * 3)) m.d.comb += self.o.compare_rhs.eq(0) m.d.comb += self.o.operation.eq(self.i.operation)