From: Luke Kenneth Casson Leighton Date: Wed, 31 Jul 2019 19:35:16 +0000 (+0100) Subject: rename FPAddStage1Data to FPPostCalcData X-Git-Tag: ls180-24jan2020~611 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1286822ae701dbea9814c06a22af8f2706383e60;p=ieee754fpu.git rename FPAddStage1Data to FPPostCalcData --- diff --git a/src/ieee754/fcvt/downsize.py b/src/ieee754/fcvt/downsize.py index 4a0dc822..1628c3f9 100644 --- a/src/ieee754/fcvt/downsize.py +++ b/src/ieee754/fcvt/downsize.py @@ -6,7 +6,7 @@ from nmigen.cli import main, verilog from nmutil.pipemodbase import PipeModBase from ieee754.fpcommon.getop import FPADDBaseData -from ieee754.fpcommon.postcalc import FPAddStage1Data +from ieee754.fpcommon.postcalc import FPPostCalcData from ieee754.fpcommon.msbhigh import FPMSBHigh from ieee754.fpcommon.exphigh import FPEXPHigh @@ -25,7 +25,7 @@ class FPCVTDownConvertMod(PipeModBase): return FPADDBaseData(self.in_pspec) def ospec(self): - return FPAddStage1Data(self.out_pspec, e_extra=True) + return FPPostCalcData(self.out_pspec, e_extra=True) def elaborate(self, platform): m = Module() diff --git a/src/ieee754/fcvt/float2int.py b/src/ieee754/fcvt/float2int.py index 7ff94fc0..845a4e00 100644 --- a/src/ieee754/fcvt/float2int.py +++ b/src/ieee754/fcvt/float2int.py @@ -6,7 +6,7 @@ from nmigen.cli import main, verilog from ieee754.fpcommon.fpbase import Overflow from ieee754.fpcommon.getop import FPADDBaseData -from ieee754.fpcommon.postcalc import FPAddStage1Data +from ieee754.fpcommon.postcalc import FPPostCalcData from ieee754.fpcommon.exphigh import FPEXPHigh from ieee754.fpcommon.fpbase import FPNumDecode, FPNumBaseRecord diff --git a/src/ieee754/fcvt/int2float.py b/src/ieee754/fcvt/int2float.py index 96c6309f..8c25cdb8 100644 --- a/src/ieee754/fcvt/int2float.py +++ b/src/ieee754/fcvt/int2float.py @@ -6,7 +6,7 @@ from nmigen.cli import main, verilog from nmutil.pipemodbase import PipeModBase from ieee754.fpcommon.getop import FPADDBaseData -from ieee754.fpcommon.postcalc import FPAddStage1Data +from ieee754.fpcommon.postcalc import FPPostCalcData from ieee754.fpcommon.msbhigh import FPMSBHigh from ieee754.fpcommon.fpbase import FPNumDecode, FPNumBaseRecord @@ -27,7 +27,7 @@ class FPCVTIntToFloatMod(PipeModBase): return FPADDBaseData(self.in_pspec) def ospec(self): - return FPAddStage1Data(self.out_pspec, e_extra=True) + return FPPostCalcData(self.out_pspec, e_extra=True) def elaborate(self, platform): m = Module() diff --git a/src/ieee754/fcvt/upsize.py b/src/ieee754/fcvt/upsize.py index e225a2af..9aefa328 100644 --- a/src/ieee754/fcvt/upsize.py +++ b/src/ieee754/fcvt/upsize.py @@ -10,7 +10,7 @@ from nmigen.cli import main, verilog from nmutil.pipemodbase import PipeModBase from ieee754.fpcommon.getop import FPADDBaseData -from ieee754.fpcommon.postcalc import FPAddStage1Data +from ieee754.fpcommon.postcalc import FPPostCalcData from ieee754.fpcommon.fpbase import FPNumDecode, FPNumBaseRecord @@ -26,7 +26,7 @@ class FPCVTUpConvertMod(PipeModBase): return FPADDBaseData(self.in_pspec) def ospec(self): - return FPAddStage1Data(self.out_pspec, e_extra=False) + return FPPostCalcData(self.out_pspec, e_extra=False) def elaborate(self, platform): m = Module() diff --git a/src/ieee754/fpadd/add1.py b/src/ieee754/fpadd/add1.py index 4b92ad1a..e8fd5e99 100644 --- a/src/ieee754/fpadd/add1.py +++ b/src/ieee754/fpadd/add1.py @@ -9,7 +9,7 @@ from nmigen.cli import main, verilog from math import log from nmutil.pipemodbase import PipeModBase -from ieee754.fpcommon.postcalc import FPAddStage1Data +from ieee754.fpcommon.postcalc import FPPostCalcData from ieee754.fpadd.add0 import FPAddStage0Data @@ -25,7 +25,7 @@ class FPAddStage1Mod(PipeModBase): return FPAddStage0Data(self.pspec) def ospec(self): - return FPAddStage1Data(self.pspec) + return FPPostCalcData(self.pspec) def elaborate(self, platform): m = Module() diff --git a/src/ieee754/fpadd/pipeline.py b/src/ieee754/fpadd/pipeline.py index 6792a20c..943533c6 100644 --- a/src/ieee754/fpadd/pipeline.py +++ b/src/ieee754/fpadd/pipeline.py @@ -16,13 +16,13 @@ scnorm - FPDIVSpecialCasesDeNorm ispec FPADDBaseData FPAlignModSingle addalign - FPAddAlignSingleAdd ispec FPSCData --------- ospec FPAddStage1Data +-------- ospec FPPostCalcData StageChain: FPAddAlignSingleMod FPAddStage0Mod FPAddStage1Mod -normpack - FPNormToPack ispec FPAddStage1Data +normpack - FPNormToPack ispec FPPostCalcData -------- ospec FPPackData StageChain: Norm1ModSingle, diff --git a/src/ieee754/fpadd/statemachine.py b/src/ieee754/fpadd/statemachine.py index aed69932..1f59cacb 100644 --- a/src/ieee754/fpadd/statemachine.py +++ b/src/ieee754/fpadd/statemachine.py @@ -13,7 +13,7 @@ from nmutil.singlepipe import StageChain from ieee754.fpcommon.fpbase import FPState, FPID from ieee754.fpcommon.getop import (FPGetOp, FPADDBaseData, FPGet2Op) from ieee754.fpcommon.denorm import (FPSCData, FPAddDeNorm) -from ieee754.fpcommon.postcalc import FPAddStage1Data +from ieee754.fpcommon.postcalc import FPPostCalcData from ieee754.fpcommon.postnormalise import (FPNorm1Data, FPNorm1Single, FPNorm1Multi) from ieee754.fpcommon.roundz import (FPRoundData, FPRound) diff --git a/src/ieee754/fpcommon/postcalc.py b/src/ieee754/fpcommon/postcalc.py index fc906a2d..c71bdf90 100644 --- a/src/ieee754/fpcommon/postcalc.py +++ b/src/ieee754/fpcommon/postcalc.py @@ -7,7 +7,7 @@ from ieee754.fpcommon.fpbase import Overflow, FPNumBaseRecord from ieee754.fpcommon.getop import FPPipeContext -class FPAddStage1Data: +class FPPostCalcData: def __init__(self, pspec, e_extra=False): width = pspec.width diff --git a/src/ieee754/fpcommon/postnormalise.py b/src/ieee754/fpcommon/postnormalise.py index d9e245b6..5d0a6ac8 100644 --- a/src/ieee754/fpcommon/postnormalise.py +++ b/src/ieee754/fpcommon/postnormalise.py @@ -13,7 +13,7 @@ from ieee754.fpcommon.fpbase import FPState from ieee754.fpcommon.getop import FPPipeContext from ieee754.fpcommon.msbhigh import FPMSBHigh from ieee754.fpcommon.exphigh import FPEXPHigh -from ieee754.fpcommon.postcalc import FPAddStage1Data +from ieee754.fpcommon.postcalc import FPPostCalcData class FPNorm1Data: @@ -40,7 +40,7 @@ class FPNorm1ModSingle(PipeModBase): super().__init__(pspec, "normalise_1") def ispec(self): - return FPAddStage1Data(self.pspec, e_extra=self.e_extra) + return FPPostCalcData(self.pspec, e_extra=self.e_extra) def ospec(self): return FPNorm1Data(self.pspec) diff --git a/src/ieee754/fpdiv/div2.py b/src/ieee754/fpdiv/div2.py index b62bec81..6cb1f5b3 100644 --- a/src/ieee754/fpdiv/div2.py +++ b/src/ieee754/fpdiv/div2.py @@ -13,7 +13,7 @@ from nmigen import Module, Signal, Cat from nmigen.cli import main, verilog from nmutil.pipemodbase import PipeModBase -from ieee754.fpcommon.postcalc import FPAddStage1Data +from ieee754.fpcommon.postcalc import FPPostCalcData from ieee754.div_rem_sqrt_rsqrt.div_pipe import DivPipeOutputData @@ -33,7 +33,7 @@ class FPDivStage2Mod(PipeModBase): def ospec(self): # XXX REQUIRED. MUST NOT BE CHANGED. this is the format # required for ongoing processing (normalisation, correction etc.) - return FPAddStage1Data(self.pspec) # out to post-process + return FPPostCalcData(self.pspec) # out to post-process def elaborate(self, platform): m = Module() diff --git a/src/ieee754/fpdiv/divstages.py b/src/ieee754/fpdiv/divstages.py index e8829dcc..ebaaa2e9 100644 --- a/src/ieee754/fpdiv/divstages.py +++ b/src/ieee754/fpdiv/divstages.py @@ -106,7 +106,7 @@ class FPDivStagesFinal(PipeModBaseChain): divstages.append(DivPipeFinalStage(self.pspec)) # does conversion from DivPipeOutputData into - # FPAddStage1Data format (bad name, TODO, doesn't matter), + # FPPostCalcData format (bad name, TODO, doesn't matter), # so that post-normalisation and corrections can take over divstages.append(FPDivStage2Mod(self.pspec)) diff --git a/src/ieee754/fpdiv/pipeline.py b/src/ieee754/fpdiv/pipeline.py index c73d3814..399867b4 100644 --- a/src/ieee754/fpdiv/pipeline.py +++ b/src/ieee754/fpdiv/pipeline.py @@ -35,7 +35,7 @@ pipediv1 - FPDivStagesIntermediate ispec DivPipeInterstageData ... pipediv5 - FPDivStageFinal ispec FPDivStage0Data --------- ospec FPAddStage1Data +-------- ospec FPPostCalcData StageChain: DivPipeCalculateStage, ... @@ -43,7 +43,7 @@ pipediv5 - FPDivStageFinal ispec FPDivStage0Data DivPipeFinalStage, FPDivStage2Mod -normpack - FPNormToPack ispec FPAddStage1Data +normpack - FPNormToPack ispec FPPostCalcData -------- ospec FPPackData StageChain: Norm1ModSingle, diff --git a/src/ieee754/fpmul/align.py b/src/ieee754/fpmul/align.py index b105f8ef..f2559c2b 100644 --- a/src/ieee754/fpmul/align.py +++ b/src/ieee754/fpmul/align.py @@ -9,7 +9,7 @@ from ieee754.fpcommon.fpbase import FPNumBase from ieee754.fpcommon.getop import FPPipeContext from ieee754.fpcommon.msbhigh import FPMSBHigh from ieee754.fpcommon.denorm import FPSCData -from ieee754.fpcommon.postcalc import FPAddStage1Data +from ieee754.fpcommon.postcalc import FPPostCalcData class FPAlignModSingle(PipeModBase): diff --git a/src/ieee754/fpmul/mul1.py b/src/ieee754/fpmul/mul1.py index b83432ff..ce73ab29 100644 --- a/src/ieee754/fpmul/mul1.py +++ b/src/ieee754/fpmul/mul1.py @@ -8,7 +8,7 @@ from nmigen import Module, Signal from nmigen.cli import main, verilog from nmutil.pipemodbase import PipeModBase -from ieee754.fpcommon.postcalc import FPAddStage1Data +from ieee754.fpcommon.postcalc import FPPostCalcData from ieee754.fpmul.mul0 import FPMulStage0Data @@ -23,7 +23,7 @@ class FPMulStage1Mod(PipeModBase): return FPMulStage0Data(self.pspec) def ospec(self): - return FPAddStage1Data(self.pspec) + return FPPostCalcData(self.pspec) def elaborate(self, platform): m = Module() diff --git a/src/ieee754/fpmul/mulstages.py b/src/ieee754/fpmul/mulstages.py index 95fc5be3..09e79eb7 100644 --- a/src/ieee754/fpmul/mulstages.py +++ b/src/ieee754/fpmul/mulstages.py @@ -7,7 +7,7 @@ from nmutil.singlepipe import StageChain from nmutil.pipemodbase import PipeModBaseChain from ieee754.fpcommon.denorm import FPSCData -from ieee754.fpcommon.postcalc import FPAddStage1Data +from ieee754.fpcommon.postcalc import FPPostCalcData from ieee754.fpmul.mul0 import FPMulStage0Mod from ieee754.fpmul.mul1 import FPMulStage1Mod diff --git a/src/ieee754/fpmul/pipeline.py b/src/ieee754/fpmul/pipeline.py index adb66a37..c20fa625 100644 --- a/src/ieee754/fpmul/pipeline.py +++ b/src/ieee754/fpmul/pipeline.py @@ -16,12 +16,12 @@ scnorm - FPDIVSpecialCasesDeNorm ispec FPADDBaseData FPAlignModSingle mulstages - FPMulStages ispec FPSCData ---------- ospec FPAddStage1Data +--------- ospec FPPostCalcData StageChain: FPMulStage0Mod FPMulStage1Mod -normpack - FPNormToPack ispec FPAddStage1Data +normpack - FPNormToPack ispec FPPostCalcData -------- ospec FPPackData StageChain: Norm1ModSingle,