From: Cesar Strauss Date: Mon, 8 Mar 2021 10:22:57 +0000 (-0300) Subject: Remove the unused internal insn_done signal X-Git-Tag: convert-csv-opcode-to-binary~87 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2b28b421d9d111376ae209a0bd597b6745d15c7d;p=soc.git Remove the unused internal insn_done signal This was used previously to enable writing to the PC register, but it's done now within a state transition. --- diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py index 42fd3362..612fd711 100644 --- a/src/soc/simple/issuer.py +++ b/src/soc/simple/issuer.py @@ -392,7 +392,7 @@ class TestIssuerInternal(Elaboratable): comb += self.state_w_sv.data_i.eq(new_svstate) sync += cur_state.svstate.eq(new_svstate) # for next clock - def execute_fsm(self, m, core, insn_done, pc_changed, sv_changed, + def execute_fsm(self, m, core, pc_changed, sv_changed, exec_insn_valid_i, exec_insn_ready_o, exec_pc_valid_o, exec_pc_ready_i): """execute FSM @@ -436,7 +436,6 @@ class TestIssuerInternal(Elaboratable): with m.If(self.state_nia.wen & (1<