From: Luke Kenneth Casson Leighton Date: Thu, 16 Jul 2020 10:17:18 +0000 (+0100) Subject: more tidyup on use of CompOpSubsetBase X-Git-Tag: div_pipeline~2 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=405c553000035b8e369e6b8f9e04c264d18aea9b;p=soc.git more tidyup on use of CompOpSubsetBase --- diff --git a/src/soc/fu/mul/mul_input_record.py b/src/soc/fu/mul/mul_input_record.py index 8d85d913..b5334dec 100644 --- a/src/soc/fu/mul/mul_input_record.py +++ b/src/soc/fu/mul/mul_input_record.py @@ -1,9 +1,10 @@ -from nmigen.hdl.rec import Record, Layout +from soc.fu.base_input_record import CompOpSubsetBase +from nmigen.hdl.rec import Layout from soc.decoder.power_enums import MicrOp, Function, CryIn -class CompMULOpSubset(Record): +class CompMULOpSubset(CompOpSubsetBase): """CompMULOpSubset a copy of the relevant subset information from Decode2Execute1Type @@ -25,30 +26,5 @@ class CompMULOpSubset(Record): ('insn', 32), ) - Record.__init__(self, Layout(layout), name=name) + super().__init__(layout, name=name) - # grrr. Record does not have kwargs - self.insn_type.reset_less = True - self.fn_unit.reset_less = True - self.zero_a.reset_less = True - self.invert_a.reset_less = True - self.invert_out.reset_less = True - self.is_32bit.reset_less = True - self.is_signed.reset_less = True - - def eq_from_execute1(self, other): - """ use this to copy in from Decode2Execute1Type - """ - res = [] - for fname, sig in self.fields.items(): - eqfrom = other.do.fields[fname] - res.append(sig.eq(eqfrom)) - return res - - def ports(self): - return [self.insn_type, - self.invert_a, - self.invert_out, - self.is_32bit, - self.is_signed, - ] diff --git a/src/soc/fu/shift_rot/sr_input_record.py b/src/soc/fu/shift_rot/sr_input_record.py index 6b0c7eb9..2eb052d3 100644 --- a/src/soc/fu/shift_rot/sr_input_record.py +++ b/src/soc/fu/shift_rot/sr_input_record.py @@ -1,9 +1,10 @@ -from nmigen.hdl.rec import Record, Layout +from soc.fu.base_input_record import CompOpSubsetBase +from nmigen.hdl.rec import Layout from soc.decoder.power_enums import MicrOp, Function, CryIn -class CompSROpSubset(Record): +class CompSROpSubset(CompOpSubsetBase): """CompSROpSubset a copy of the relevant subset information from Decode2Execute1Type @@ -26,33 +27,5 @@ class CompSROpSubset(Record): ('insn', 32), ) - Record.__init__(self, Layout(layout), name=name) + super().__init__(layout, name=name) - # grrr. Record does not have kwargs - self.insn_type.reset_less = True - self.fn_unit.reset_less = True - self.input_carry.reset_less = True - self.output_carry.reset_less = True - self.input_cr.reset_less = True - self.output_cr.reset_less = True - self.is_32bit.reset_less = True - self.is_signed.reset_less = True - - def eq_from_execute1(self, other): - """ use this to copy in from Decode2Execute1Type - """ - res = [] - for fname, sig in self.fields.items(): - eqfrom = other.do.fields[fname] - res.append(sig.eq(eqfrom)) - return res - - def ports(self): - return [self.insn_type, - self.input_carry, - self.output_carry, - self.input_cr, - self.output_cr, - self.is_32bit, - self.is_signed, - ] diff --git a/src/soc/fu/spr/spr_input_record.py b/src/soc/fu/spr/spr_input_record.py index 72402d3e..a19d2ba3 100644 --- a/src/soc/fu/spr/spr_input_record.py +++ b/src/soc/fu/spr/spr_input_record.py @@ -1,6 +1,6 @@ - -from soc.decoder.power_enums import (MicrOp, Function) from soc.fu.base_input_record import CompOpSubsetBase +from soc.decoder.power_enums import (MicrOp, Function) + class CompSPROpSubset(CompOpSubsetBase): """CompSPROpSubset