From: Andrew Waterman <waterman@cs.berkeley.edu>
Date: Fri, 19 Feb 2016 21:05:50 +0000 (-0800)
Subject: sptbr now a holds a PPN, not an address
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=48e4425644c9984ea73df6633f13c8ff60d44d4d;p=riscv-isa-sim.git

sptbr now a holds a PPN, not an address
---

diff --git a/riscv/mmu.cc b/riscv/mmu.cc
index 0ba3785..b8fb028 100644
--- a/riscv/mmu.cc
+++ b/riscv/mmu.cc
@@ -120,7 +120,7 @@ reg_t mmu_t::walk(reg_t addr, bool supervisor, access_type type)
   if (masked_msbs != 0 && masked_msbs != mask)
     return -1;
 
-  reg_t base = proc->get_state()->sptbr;
+  reg_t base = proc->get_state()->sptbr << PGSHIFT;
   int ptshift = (levels - 1) * ptidxbits;
   for (int i = 0; i < levels; i++, ptshift -= ptidxbits) {
     reg_t idx = (addr >> (PGSHIFT + ptshift)) & ((1 << ptidxbits) - 1);
diff --git a/riscv/processor.cc b/riscv/processor.cc
index 55096c2..e948a47 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -372,7 +372,7 @@ void processor_t::set_csr(int which, reg_t val)
     }
     case CSR_SEPC: state.sepc = val; break;
     case CSR_STVEC: state.stvec = val >> 2 << 2; break;
-    case CSR_SPTBR: state.sptbr = val & -PGSIZE; break;
+    case CSR_SPTBR: state.sptbr = val; break;
     case CSR_SSCRATCH: state.sscratch = val; break;
     case CSR_SCAUSE: state.scause = val; break;
     case CSR_SBADADDR: state.sbadaddr = val; break;