From: Cesar Strauss <cestrauss@gmail.com>
Date: Mon, 15 Mar 2021 22:33:34 +0000 (-0300)
Subject: Fix import
X-Git-Tag: convert-csv-opcode-to-binary~32
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4e189a25fc979c449ddd8154efce4de6c34c4f2f;p=soc.git

Fix import
---

diff --git a/src/soc/decoder/power_svp64_rm.py b/src/soc/decoder/power_svp64_rm.py
index d98c16ef..bd1cd416 100644
--- a/src/soc/decoder/power_svp64_rm.py
+++ b/src/soc/decoder/power_svp64_rm.py
@@ -20,7 +20,7 @@ from nmigen import Elaboratable, Module, Signal
 from soc.decoder.power_enums import (SVP64RMMode, Function, SVPtype,
                                     SVP64PredMode, SVP64sat)
 from soc.consts import EXTRA3
-from soc.svp64 import SVP64Rec
+from soc.sv.svp64 import SVP64Rec
 from nmutil.util import sel