From: Luke Kenneth Casson Leighton Date: Thu, 27 May 2021 13:52:36 +0000 (+0000) Subject: set fake-mem LibreSOCMem output q as a Net Output X-Git-Tag: LS180_RC3~40 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=57d352c9e9151d7c7cc2e19f29de1cdc393c589f;p=soclayout.git set fake-mem LibreSOCMem output q as a Net Output --- diff --git a/experiments9/LibreSOCMem.py b/experiments9/LibreSOCMem.py index b5c2764..3bb757d 100644 --- a/experiments9/LibreSOCMem.py +++ b/experiments9/LibreSOCMem.py @@ -250,6 +250,10 @@ def _load(): x += step net.setExternal(True) NetExternalComponents.setExternal(pin) + # q is an output, has to be explicitly set as output + # everything else can kinda get away with not being set + if name == 'q': + net.setDirection( Net.Direction.OUT ) # separate the pin groups x += step * 3