From: lkcl <lkcl@web>
Date: Sat, 25 Mar 2023 20:14:21 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls001_v3~66
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5bc28c957934d0db1814f70779ccf0d5ab7bd70b;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls008.mdwn b/openpower/sv/rfc/ls008.mdwn
index 408578598..3fda6ee30 100644
--- a/openpower/sv/rfc/ls008.mdwn
+++ b/openpower/sv/rfc/ls008.mdwn
@@ -237,11 +237,20 @@ SVSTATE contains (and permits setting of):
    REMAPed: RA, RB, RC, RT and EA are the canonical (typical) register names
    associated with each bit, with RA being the LSB and EA being the MSB.
    See table below for ordering. When `SVme` is zero (0b00000) REMAP
-   is **fully disabled and inactive**.
+   is **fully disabled and inactive** regardless of the contents of
+  `SVSTATE`, `mi0-mi2/mo0-mo1`, or the four `SVSHAPEn` SPRs
 * mi0-mi2/mo0-mo1 - when the corresponding SVme bit is enabled, these
   indicate the SVSHAPE (0-3) that the corresponding register (RA etc)
   should use, as long as the register's corresponding SVme bit is set 
 
+Programmer's Note: the fact that REMAP is entirely dormant when `SVme` is zero
+allows establishment of REMAP context well in advance, followed by utilising `svremap`
+at a precise (or the very last) moment.  Some implementations may exploit this
+to cache (or take some time to prepare caches) in the background whilst other
+(unrelated) instructions are being executed. This is particularly important to
+bear in mind when using `svindex` which will require hardware to perform (and
+cache) additional GPR reads.
+
 Programmer's Note: when REMAP is activated it becomes necessary on any
 context-switch (Interrupt or Function call) to detect (or know in advance)
 that REMAP is enabled and to additionally save/restore the four SVSHAPE