From: Tobias Platen <tplaten@posteo.de>
Date: Wed, 2 Mar 2022 17:46:15 +0000 (+0100)
Subject: add instructions how to build bitstring for orangecrab
X-Git-Tag: opf_rfc_ls005_v1~3162
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=68b84bee32a06e490bff4e01617c153a13240da0;p=libreriscv.git

add instructions how to build bitstring for orangecrab
---

diff --git a/HDL_workflow/microwatt.mdwn b/HDL_workflow/microwatt.mdwn
index 226fcd2ab..e998aa331 100644
--- a/HDL_workflow/microwatt.mdwn
+++ b/HDL_workflow/microwatt.mdwn
@@ -58,6 +58,7 @@ This needs gcc-powerpc64le-linux-gnu if cross compilation is used.
 	make 
 	
 ## Building microwatt-verilator using the libre-soc core
+
 	cd /path/to/soc
 	make microwatt_external_core
 	cp external_core_top.v /path/to/microwatt
@@ -67,8 +68,18 @@ This needs gcc-powerpc64le-linux-gnu if cross compilation is used.
 	make microwatt-verilator
 
 ## Running the simulation
+
 	cp microwatt/arch/powerpc/boot/dtbImage.microwatt
 	./microwatt-verilator sdram_init.bin dtbImage.microwatt
+	
+## Building the bitstring for OrangeCrab
+
+  cd microwatt
+  export FPGA_TARGET=ORANGE-CRAB
+  export GHDLSYNTH=ghdl
+  make microwatt.bit
+
+
 
 ## TODO: buildroot