From: lkcl Date: Mon, 11 Dec 2023 02:54:03 +0000 (+0000) Subject: (no commit message) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=69fabd43b8993f74c91a855ff0043032be9c4c66;p=libreriscv.git --- diff --git a/openpower/sv/cr_ops.mdwn b/openpower/sv/cr_ops.mdwn index e9d0b45a3..bcfa95e70 100644 --- a/openpower/sv/cr_ops.mdwn +++ b/openpower/sv/cr_ops.mdwn @@ -162,6 +162,13 @@ Also exactly as with [[sv/normal]] fail-first, VL cannot, unlike [[sv/ldst]], be set to an arbitrary value. Deterministic behaviour is *required*. +Important also to note is that reduce mode is implied by Data-Dependent Fail-First. +In other words where normally if the destination is Scalar, the looping +terminates at the first result, Data-Dependent Fail-First *continues* +just as it does in reduce mode. This allows effectively *conditional* +reduction (one register is both a source and destination) where testing of +each result gives an option to exit. + **Apparent contradictory behaviour compared to Rc=1,VLi=0** In [[openpower/sv/normal]] mode when Rc=1 and VLi=0 the Vector of