From: Andrew Waterman Date: Tue, 13 Oct 2015 16:42:36 +0000 (-0700) Subject: Fix --dc flag X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8234ee969db475c1ba759dea6938522f64c1ee62;p=riscv-isa-sim.git Fix --dc flag Resolves #33. --- diff --git a/riscv/mmu.cc b/riscv/mmu.cc index 6173b43..a8b1675 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -60,7 +60,9 @@ void mmu_t::load_slow_path(reg_t addr, reg_t len, uint8_t* bytes) reg_t paddr = translate(addr, LOAD); if (paddr < memsz) { memcpy(bytes, mem + paddr, len); - if (!tracer.interested_in_range(paddr, paddr + PGSIZE, LOAD)) + if (tracer.interested_in_range(paddr, paddr + PGSIZE, LOAD)) + tracer.trace(paddr, len, LOAD); + else refill_tlb(addr, paddr, LOAD); } else if (!proc || !proc->sim->mmio_load(addr, len, bytes)) { throw trap_load_access_fault(addr); @@ -72,7 +74,9 @@ void mmu_t::store_slow_path(reg_t addr, reg_t len, const uint8_t* bytes) reg_t paddr = translate(addr, STORE); if (paddr < memsz) { memcpy(mem + paddr, bytes, len); - if (!tracer.interested_in_range(paddr, paddr + PGSIZE, STORE)) + if (tracer.interested_in_range(paddr, paddr + PGSIZE, STORE)) + tracer.trace(paddr, len, STORE); + else refill_tlb(addr, paddr, STORE); } else if (!proc || !proc->sim->mmio_store(addr, len, bytes)) { throw trap_store_access_fault(addr);