From: lkcl Date: Sun, 16 Apr 2023 10:00:06 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls009_v1~38 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8cfa5a02cf33f3ed33b5dc505046b3b403814e32;p=libreriscv.git --- diff --git a/openpower/sv/remap/appendix.mdwn b/openpower/sv/remap/appendix.mdwn index 167cabc61..d4b99c5a2 100644 --- a/openpower/sv/remap/appendix.mdwn +++ b/openpower/sv/remap/appendix.mdwn @@ -21,18 +21,20 @@ index, instead. Given that there are four possible SHAPE entries, up to four separate registers in any given operation may be simultaneously remapped: - function op_add(rd, rs1, rs2) # add not VADD! +``` + function op_add(RT, RA, RB) # add not VADD! ... ... -  for (i = 0; i < VL; i++) - xSTATE.srcoffs = i # save context - if (predval & 1<