From: Andrew Waterman Date: Sat, 15 Mar 2014 23:48:16 +0000 (-0700) Subject: speed up compilation a bit X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a0765388661018f059f74379b5497cf1607f4846;p=riscv-isa-sim.git speed up compilation a bit --- diff --git a/riscv/processor.cc b/riscv/processor.cc index e931c6b..39848b4 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -32,6 +32,7 @@ processor_t::processor_t(sim_t* _sim, mmu_t* _mmu, uint32_t _id) processor_t::~processor_t() { + delete disassembler; } void state_t::reset() diff --git a/riscv/processor.h b/riscv/processor.h index 9e52d3d..e2847fa 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -5,7 +5,6 @@ #include "decode.h" #include "config.h" #include -#include #include class processor_t; @@ -80,7 +79,7 @@ private: sim_t* sim; mmu_t* mmu; // main memory is always accessed via the mmu extension_t* ext; - std::unique_ptr disassembler; + disassembler_t* disassembler; state_t state; uint32_t id; bool run; // !reset