From: Luke Kenneth Casson Leighton Date: Fri, 20 Jul 2018 11:41:28 +0000 (+0100) Subject: add pin rules X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a7e9339b01b80317fcd67543b75e846988698fed;p=pinmux.git add pin rules --- diff --git a/src/bsv/bsv_lib/slow_peripherals_template.bsv b/src/bsv/bsv_lib/slow_peripherals_template.bsv index 026449d..871d3ae 100644 --- a/src/bsv/bsv_lib/slow_peripherals_template.bsv +++ b/src/bsv/bsv_lib/slow_peripherals_template.bsv @@ -129,6 +129,7 @@ package slow_peripherals; /*========== pinmux connections ============*/ {7} +{8} rule connect_i2c0_scl; pinmux.peripheral_side.twi_scl_out(i2c0.out.scl_out); pinmux.peripheral_side.twi_scl_outen(pack(i2c0.out.scl_out_en)); diff --git a/src/bsv/peripheral_gen.py b/src/bsv/peripheral_gen.py index 520a5d0..b2e36ac 100644 --- a/src/bsv/peripheral_gen.py +++ b/src/bsv/peripheral_gen.py @@ -42,6 +42,22 @@ class PBase(object): return tuple2(True,fromInteger(valueOf({2}))); else""".format(bname, bend, name) + def mk_pincon(self, name, count): + ret = [] + for p in self.peripheral.pinspecs: + typ = p['type'] + pname = p['name'] + ret.append(" rule con_%s%d_%s_%s" % (name, count, pname, typ)) + sname = self.peripheral.pname(pname).format(count) + ps = "pinmux.peripheral_side.%s" % sname + if typ == 'out': + fname = self.pinname_out(pname) + n = "{0}{1}".format(name, self.mksuffix(name, count)) + ret.append(" {0}_out({1}.{2});".format(ps, n, fname)) + ret.append(" //%s" % str(p)) + ret.append(" endrule") + return '\n'.join(ret) + def mk_cellconn(self, *args): return '' @@ -74,6 +90,15 @@ class PBase(object): def _mk_connection(self, name=None, count=0): return '' + def pinname_out(self, pname): + return '' + + def pinname_in(self, pname): + return '' + + def pinname_outen(self, pname): + return '' + class uart(PBase): @@ -95,6 +120,11 @@ class uart(PBase): def _mk_connection(self, name=None, count=0): return "uart{0}.slave_axi_uart" + def pinname_out(self, pname): + return {'tx': 'coe_rs232.sout'}.get(pname, '') + + def pinname_in(self, pname): + return {'rx': 'coe_rs232.sin'}.get(pname, '') class rs232(PBase): @@ -274,7 +304,7 @@ class PeripheralIface(object): self.slow = slow(ifacename) self.slow.peripheral = self for fname in ['slowimport', 'slowifdecl', 'mkslow_peripheral', - 'mk_connection', 'mk_cellconn']: + 'mk_connection', 'mk_cellconn', 'mk_pincon']: fn = CallFn(self, fname) setattr(self, fname, types.MethodType(fn, self)) @@ -388,6 +418,14 @@ class PeripheralInterfaces(object): ret = '\n'.join(list(filter(None, ret))) return pinmux_cellrule.format(ret) + def mk_pincon(self): + ret = [] + for (name, count) in self.ifacecount: + for i in range(count): + txt = self.data[name].mk_pincon(name, i) + ret.append(txt) + return '\n'.join(list(filter(None, ret))) + class PFactory(object): def getcls(self, name): for k, v in {'uart': uart, diff --git a/src/bsv/pinmux_generator.py b/src/bsv/pinmux_generator.py index 7f91db9..b50a0a0 100644 --- a/src/bsv/pinmux_generator.py +++ b/src/bsv/pinmux_generator.py @@ -107,9 +107,11 @@ def write_slow(slow, template, p, ifaces, iocells): mkslow = ifaces.mkslow_peripheral() mkcon = ifaces.mk_connection() mkcellcon = ifaces.mk_cellconn() + pincon = ifaces.mk_pincon() with open(slow, "w") as bsv_file: bsv_file.write(template.format(imports, ifdecl, regdef, slavedecl, - fnaddrmap, mkslow, mkcon, mkcellcon)) + fnaddrmap, mkslow, mkcon, mkcellcon, + pincon)) def write_bus(bus, p, ifaces):