From: Andrew Waterman Date: Tue, 31 Jan 2012 00:30:02 +0000 (-0800) Subject: don't set badvaddr for instruction access faults X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ace6db857d06e01e06677a4c1df6596dfe793677;p=riscv-isa-sim.git don't set badvaddr for instruction access faults --- diff --git a/riscv/mmu.cc b/riscv/mmu.cc index aa62b90..55273f3 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -42,10 +42,11 @@ void* mmu_t::refill(reg_t addr, bool store, bool fetch) reg_t perm = (fetch ? PTE_UX : store ? PTE_UW : PTE_UR) | PTE_E; if(unlikely((pte_perm & perm) != perm)) { + if (fetch) + throw trap_instruction_access_fault; + badvaddr = addr; - throw store ? trap_store_access_fault - : fetch ? trap_instruction_access_fault - : trap_load_access_fault; + throw store ? trap_store_access_fault : trap_load_access_fault; } tlb_load_tag[idx] = (pte_perm & PTE_UR) ? expected_tag : -1;