From: Andrey Miroshnikov Date: Mon, 27 Jun 2022 12:52:09 +0000 (+0100) Subject: Added power pipeline diagram X-Git-Tag: opf_rfc_ls005_v1~1491 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ca47450704a3ae2137194a6ea8cdcac02bb23f69;p=libreriscv.git Added power pipeline diagram --- diff --git a/svp64-primer/img/power_pipelines.png b/svp64-primer/img/power_pipelines.png new file mode 100644 index 000000000..98afc6b8b Binary files /dev/null and b/svp64-primer/img/power_pipelines.png differ diff --git a/svp64-primer/img/power_pipelines.svg b/svp64-primer/img/power_pipelines.svg new file mode 100644 index 000000000..fbbd63de2 --- /dev/null +++ b/svp64-primer/img/power_pipelines.svg @@ -0,0 +1,669 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + image/svg+xml + + + + + + + + FetchPC + + Decode + + + Issue + + Execute + Scalar + + FetchPC + + Decode + + Issue + + Execute + + Loop0...VL-1 + + SV + PredicateMask bits + + + + + + + + diff --git a/svp64-primer/summary.tex b/svp64-primer/summary.tex index cb1d46faf..17e671f94 100644 --- a/svp64-primer/summary.tex +++ b/svp64-primer/summary.tex @@ -44,7 +44,7 @@ the Power ISA's Supercomputing pedigree. \begin{figure}[hb] \centering - \includegraphics[width=0.6\linewidth]{power_pipelines} + \includegraphics[width=0.6\linewidth]{power_pipelines.png} \caption{Showing how SV fits in between Decode and Issue} \label{fig:power_pipelines} \end{figure}